1 2 3 4 5 6 7 8 9 10 11
12 /*!
13 * ======== DAC12 ========
14 * MSP430 12-bit Digital to Analog Converter
15 */
16 metaonly module DAC12 inherits IDAC {
17
18 struct DAC12_xCTL_t {
19 DAC12OPS_t DAC12OPS; /*! DAC12 output select
20 * 0 DAC12_0 output on P6.6, DAC12_1 output on P6.7
21 * 1 DAC12_0 output on VeREF+, DAC12_1 output on P6.5 */
22 DAC12SREF_t DAC12SREF; /*! DAC12 select reference voltage
23 * 00 VREF+
24 * 01 VREF+
25 * 10 VeREF+
26 * 11 VeREF+ */
27 DAC12RES_t DAC12RES; /*! DAC12 resolution select
28 * 0 12-bit resolution
29 * 1 8-bit resolution */
30 DAC12LSEL_t DAC12LSEL; /*! DAC12 load select. Selects the load trigger for the DAC12 latch. DAC12ENC
31 * must be set for the DAC to update, except when DAC12LSELx = 0.
32 * 00 DAC12 latch loads when DAC12_xDATwritten (DAC12ENCis ignored)
33 * 01 DAC12 latch loads when DAC12_xDAT written, or, when grouped,
34 * when all DAC12_xDAT registers in the group have been written.
35 * 10 Rising edge of Timer_A.OUT1 (TA1)
36 * 11 Rising edge of Timer_B.OUT2 (TB2) */
37 DAC12CALON_t DAC12CALON; /*! DAC12 calibration on. This bit initiates the DAC12 offset calibration sequence
38 * and is automatically reset when the calibration completes.
39 * 0 Calibration is not active
40 * 1 Initiate calibration/calibration in progress */
41 DAC12IR_t DAC12IR; /*! DAC12 input range. This bit sets the reference input and voltage output range.
42 * 0 DAC12 full-scale output = 3x reference voltage
43 * 1 DAC12 full-scale output = 1x reference voltage */
44 DAC12AMP_t DAC12AMP; /*! DAC12 amplifier setting. These bits select settling time vs current
45 * consumption for the DAC12 input and output amplifiers.
46 * DAC12AMPx Input Buffer Output Buffer
47 * 000 Off DAC12 off, output high Z
48 * 001 Off DAC12 off, output 0 V
49 * 010 Low speed/current Low speed/current
50 * 011 Low speed/current Medium speed/current
51 * 100 Low speed/current High speed/current
52 * 101 Medium speed/current Medium speed/current
53 * 110 Medium speed/current High speed/current
54 * 111 High speed/current High speed/current */
55 DAC12DF_t DAC12DF; /*! DAC12 data format
56 * 0 Straight binary
57 * 1 2s complement */
58 DAC12IE_t DAC12IE; /*! DAC12 interrupt enable
59 * 0 Disabled
60 * 1 Enabled */
61 DAC12IFG_t DAC12IFG; /*! DAC12 Interrupt flag
62 * 0 No interrupt pending
63 * 1 Interrupt pending */
64 DAC12ENC_t DAC12ENC; /*! DAC12 enable conversion. This bit enables the DAC12 module when
65 * DAC12LSELx > 0. when DAC12LSELx = 0, DAC12ENC is ignored.
66 * 0 DAC12 disabled
67 * 1 DAC12 enabled */
68 DAC12GRP_t DAC12GRP; /*! DAC12 group. Groups DAC12_x with the next higher DAC12_x.
69 * 0 Not grouped
70 * 1 Grouped */
71 };
72
73 /*!
74 * ======== create ========
75 * Create an instance of this peripheral.
76 */
77 create();
78
79 instance:
80
81 /*! DAC12_0CTL Register */
82 config DAC12_xCTL_t DAC12_0CTL = {
83 DAC12OPS : DAC12OPS_OFF,
84 DAC12SREF : DAC12SREF_0,
85 DAC12RES : DAC12RES_OFF,
86 DAC12LSEL : DAC12LSEL_0,
87 DAC12CALON : DAC12CALON_OFF,
88 DAC12IR : DAC12IR_OFF,
89 DAC12AMP : DAC12AMP_0,
90 DAC12DF : DAC12DF_OFF,
91 DAC12IE : DAC12IE_OFF,
92 DAC12IFG : DAC12IFG_OFF,
93 DAC12ENC : DAC12ENC_OFF,
94 DAC12GRP : DAC12GRP_OFF
95 };
96
97 /*! DAC12_1CTL Register */
98 config DAC12_xCTL_t DAC12_1CTL = {
99 DAC12OPS : DAC12OPS_OFF,
100 DAC12SREF : DAC12SREF_0,
101 DAC12RES : DAC12RES_OFF,
102 DAC12LSEL : DAC12LSEL_0,
103 DAC12CALON : DAC12CALON_OFF,
104 DAC12IR : DAC12IR_OFF,
105 DAC12AMP : DAC12AMP_0,
106 DAC12DF : DAC12DF_OFF,
107 DAC12IE : DAC12IE_OFF,
108 DAC12IFG : DAC12IFG_OFF,
109 DAC12ENC : DAC12ENC_OFF,
110 DAC12GRP : DAC12GRP_OFF
111 };
112
113 /*! DAC12_0DAT Register */
114 config Bits16 DAC12_0DAT = 0;
115
116 /*! DAC12_1DAT Register */
117 config Bits16 DAC12_1DAT = 0;
118
119 /*! Determine if each Register needs to be forced set or not */
120 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
121 [
122 { register : "DAC12_0CTL" , regForceSet : false },
123 { register : "DAC12_1CTL" , regForceSet : false },
124 { register : "DAC12_0DAT" , regForceSet : false },
125 { register : "DAC12_1DAT" , regForceSet : false }
126 ];
127 }