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18 /*!
19 * ======== ITI8148 ========
20 * An interface implemented by all TI8148 devices
21 *
22 * This interface is defined to factor common data about all TI8148 type devices
23 * into a single place; they all have the same internal memory.
24 */
25 metaonly interface ITI8148 inherits ti.catalog.ICpuDataSheet
26 {
27 instance:
28 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
29
30 override config string cpuCore = "CM3";
31 override config string isa = "v7M";
32 override config string cpuCoreRevision = "1.0";
33 override config int minProgUnitSize = 1;
34 override config int minDataUnitSize = 1;
35 override config int dataWordSize = 4;
36
37 /*!
38 * ======== memMap ========
39 * The memory map returned be getMemoryMap().
40 */
41 config xdc.platform.IPlatform.Memory memMap[string] = [
42
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47 ["L2_ROM", {
48 name: "L2_ROM",
49 base: 0x00000000,
50 len: 0x00004000
51 }],
52
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58 ["L2_RAM", {
59 name: "L2_RAM",
60 base: 0x20000000,
61 len: 0x00040000
62 }],
63
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69 ["OCMC_0", {
70 name: "OCMC_0",
71 base: 0x00300000,
72 len: 0x00020000
73 }],
74
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80 ["OCMC_1", {
81 name: "OCMC_1",
82 base: 0x00400000,
83 len: 0x00020000
84 }],
85 ];
86 };
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