1    /*
     2     *  Copyright (c) 2011 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== ITI8148.xdc ========
    15     *
    16     */
    17    
    18    /*!
    19     *  ======== ITI8148 ========
    20     *  An interface implemented by all TI8148 devices
    21     *
    22     *  This interface is defined to factor common data about all TI8148 type devices
    23     *  into a single place; they all have the same internal memory.
    24     */
    25    metaonly interface ITI8148 inherits ti.catalog.ICpuDataSheet
    26    {
    27    instance:
    28        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    29    
    30        override config string cpuCore           = "CM3";
    31        override config string isa               = "v7M";
    32        override config string cpuCoreRevision   = "1.0";
    33        override config int    minProgUnitSize   = 1;
    34        override config int    minDataUnitSize   = 1;
    35        override config int    dataWordSize      = 4;
    36    
    37        /*!
    38         *  ======== memMap ========
    39         *  The memory map returned be getMemoryMap().
    40         */
    41        config xdc.platform.IPlatform.Memory memMap[string] = [
    42    
    43            /* 
    44             * AMMU mapped L2 ROM virtual address
    45             * Physical address is 0x55000000
    46             */
    47            ["L2_ROM", {
    48                name: "L2_ROM",
    49                base: 0x00000000,
    50                len:  0x00004000
    51            }],
    52    
    53            /* 
    54             * AMMU mapped L2 RAM virtual address
    55             * Physical address is 0x55020000
    56             * Size is 256K
    57             */
    58            ["L2_RAM", {
    59                name: "L2_RAM",
    60                base: 0x20000000, 
    61                len:  0x00040000
    62            }],
    63            
    64            /* 
    65             * OCMC (On-chip RAM) Bank 0
    66             * Physical address is 0x40300000
    67             * Size is 128K
    68             */
    69            ["OCMC_0", {
    70                name: "OCMC_0",
    71                base: 0x00300000, 
    72                len:  0x00020000
    73            }],
    74            
    75            /* 
    76             * OCMC (On-chip RAM) Bank 1
    77             * Physical address is 0x40400000
    78             * Size is 128K
    79             */
    80            ["OCMC_1", {
    81                name: "OCMC_1",
    82                base: 0x00400000, 
    83                len:  0x00020000
    84            }],
    85        ];
    86    };
    87    /*
    88     *  @(#) ti.catalog.arm.cortexm3; 1, 0, 0,99; 4-26-2011 10:50:41; /db/ztree/library/trees/platform/platform-m16x/src/
    89     */
    90