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17
18 /*!
19 * ======== ITI8168 ========
20 * An interface implemented by all TI8168 devices
21 *
22 * This interface is defined to factor common data about all TI8168 type devices
23 * into a single place; they all have the same internal memory.
24 */
25 metaonly interface ITI8168 inherits ti.catalog.ICpuDataSheet
26 {
27 instance:
28 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
29 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp1;
30 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp2;
31
32 override config string cpuCore = "v7A";
33 override config string isa = "v7A";
34 override config string cpuCoreRevision = "1.0";
35 override config int minProgUnitSize = 1;
36 override config int minDataUnitSize = 1;
37 override config int dataWordSize = 4;
38
39 /*!
40 * ======== memMap ========
41 * The memory map returned be getMemoryMap().
42 */
43 config xdc.platform.IPlatform.Memory memMap[string] = [
44 ["SRAM", {
45 comment: "On-Chip SRAM",
46 name: "SRAM",
47 base: 0x402F0000,
48 len: 0x00010000,
49 space: "code/data",
50 access: "RWX"
51 }],
52
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57 ["OCMC_0", {
58 name: "OCMC_0",
59 base: 0x40300000,
60 len: 0x00020000
61 }],
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67 ["OCMC_1", {
68 name: "OCMC_1",
69 base: 0x40400000,
70 len: 0x00020000
71 }],
72
73 ];
74 }
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