1    /*
     2     *  Copyright (c) 2011 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== Sonata.xdc ========
    15     *  
    16     */
    17    
    18    /*!
    19     *  ======== Sonata.xdc ========
    20     *  The Sonata device data sheet module.
    21     *
    22     *  This module implements the xdc.platform.ICpuDataSheet interface and is 
    23     *  used by platforms to obtain "data sheet" information about this device.
    24     *
    25     */
    26    
    27    metaonly module Sonata inherits ti.catalog.ICpuDataSheet
    28    {
    29    
    30    instance:
    31        override config string cpuCore           = "CM3";
    32        override config string isa               = "v7M";
    33        override config string cpuCoreRevision   = "1.0";
    34        override config int    minProgUnitSize   = 1;
    35        override config int    minDataUnitSize   = 1;
    36        override config int    dataWordSize      = 4;
    37    
    38        config ti.catalog.arm.peripherals.timers.Timer.Instance timer0;
    39        config ti.catalog.arm.peripherals.timers.Timer.Instance timer1;
    40        config ti.catalog.arm.peripherals.timers.Timer.Instance timer2;
    41        config ti.catalog.arm.peripherals.timers.Timer.Instance timer3;
    42    
    43        /*!
    44         *  ======== memMap ========
    45         *  The memory map returned by getMemoryMap().
    46         */
    47        config xdc.platform.IPlatform.Memory memMap[string] = [
    48            ["BOOTROM", {
    49                comment: "On-Chip Boot ROM",
    50                name: "BOOTROM",
    51                base: 0x0,
    52                len:  0x10000,
    53                space: "code",
    54                access: "RX"
    55            }],
    56    
    57            ["FLASH", {
    58                comment: "512KB Flash memory",
    59                name: "FLASH",
    60                base: 0x200000,
    61                len:  0x80000,
    62                space: "code/data",
    63                access: "RWX"
    64            }],
    65    
    66            ["OTP", {
    67                comment: "4KB OTP memory",
    68                name: "OTP",
    69                base: 0x680000,
    70                len:  0x1000,
    71                space: "code",
    72                access: "RWX"
    73            }],
    74    
    75            ["C03SRAM", {
    76                comment: "32KB On-Chip RAM Memory",
    77                name: "C03SRAM",
    78                base: 0x20000000, 
    79                len:  0x8000,
    80                space: "code/data",
    81                access: "RWX"
    82            }],
    83    
    84            ["S07SRAM", {
    85                comment: "64KB On-Chip Shared RAM Memory",
    86                name: "S07SRAM",
    87                base: 0x20008000, 
    88                len:  0x10000,
    89                space: "code/data",
    90                access: "RWX"
    91            }],
    92    
    93            ["CTOMMSGRAM", {
    94                comment: "C28 to M3 MSG RAM Memory",
    95                name: "CTOMMSGRAM",
    96                base: 0x2007F000,
    97                len:  0x800,
    98                space: "data",
    99                access: "R"
   100            }],
   101    
   102            ["MTOCMSGRAM", {
   103                comment: "M3 to C28 MSG RAM Memory",
   104                name: "MTOCMSGRAM",
   105                base: 0x2007F800,
   106                len:  0x800,
   107                space: "data",
   108                access: "RW"
   109            }],
   110        ];
   111    };
   112    
   113    /*
   114     *  @(#) ti.catalog.arm.cortexm3; 1, 0, 0,60; 1-17-2011 09:01:34; /db/ztree/library/trees/platform/platform-l32x/src/
   115     */
   116