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18 /*!
19 * ======== ITI8148 ========
20 * An interface implemented by all TI8148 devices
21 *
22 * This interface is defined to factor common data about all TI8148 type devices
23 * into a single place; they all have the same internal memory.
24 */
25 metaonly interface ITI8148 inherits ti.catalog.ICpuDataSheet
26 {
27 instance:
28 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
29
30 override config string cpuCore = "v7A";
31 override config string isa = "v7A";
32 override config string cpuCoreRevision = "1.0";
33 override config int minProgUnitSize = 1;
34 override config int minDataUnitSize = 1;
35 override config int dataWordSize = 4;
36
37 /*!
38 * ======== memMap ========
39 * The memory map returned be getMemoryMap().
40 */
41 config xdc.platform.IPlatform.Memory memMap[string] = [
42 ["SRAM", {
43 comment: "On-Chip SRAM",
44 name: "SRAM",
45 base: 0x402F0000,
46 len: 0x00010000,
47 space: "code/data",
48 access: "RWX"
49 }],
50
51 52 53 54
55 ["OCMC_0", {
56 name: "OCMC_0",
57 base: 0x40300000,
58 len: 0x00020000
59 }],
60
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65 ["OCMC_1", {
66 name: "OCMC_1",
67 base: 0x40400000,
68 len: 0x00020000
69 }],
70
71 ];
72 }
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