1 /*
2 * Copyright (c) 2010 by Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * */
12
13 /*
14 * ======== TMS320DA802.xdc ========
15 *
16 */
17 package ti.catalog.c6000;
18
19 /*!
20 * ======== TMS320DA802 ========
21 * The DA802 device data sheet module.
22 */
23 metaonly module TMS320DA802 inherits ITMS320DA8xx
24 {
25 override config long cacheSizeL2[string] = [
26 ["0k", 0x00000],
27 ["32k", 0x08000],
28 ["64k", 0x10000],
29 ["128k", 0x20000]
30 ];
31
32 override readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
33 ['l1PMode',{desc:"L1P Cache",
34 base: 0x11E00000,
35 map : [["0k",0x0000],
36 ["4k",0x1000],
37 ["8k",0x2000],
38 ["16k",0x4000],
39 ["32k",0x8000]],
40 defaultValue: "32k",
41 memorySection: "L1PSRAM"}],
42
43 ['l1DMode',{desc:"L1D Cache",
44 base: 0x11F00000,
45 map : [["0k",0x0000],
46 ["4k",0x1000],
47 ["8k",0x2000],
48 ["16k",0x4000],
49 ["32k",0x8000]],
50 defaultValue: "32k",
51 memorySection: "L1DSRAM"}],
52
53 ['l2Mode',{desc:"L2 Cache",
54 base: 0x11800000,
55 map : [["0k",0x0000],
56 ["32k",0x8000],
57 ["64k",0x10000],
58 ["128k",0x20000]],
59 defaultValue: "0k",
60 memorySection: "IRAM"}],
61
62 ];
63
64
65 instance:
66
67 /*!
68 * ======== memMap ========
69 * The default memory map for this device
70 */
71 override config xdc.platform.IPlatform.Memory memMap[string] = [
72 ["IROM", {
73 comment: "Internal 1MB L2 ROM",
74 name: "IROM",
75 base: 0x11700000,
76 len: 0x00100000,
77 space: "code/data",
78 access: "RX"
79 }],
80
81 ["IRAM", {
82 comment: "Internal 128KB L2 memory",
83 name: "IRAM",
84 base: 0x11800000,
85 len: 0x00020000,
86 space: "code/data",
87 access: "RWX"
88 }],
89
90 ["L1PSRAM", {
91 comment: "Internal 32KB L1 program memory",
92 name: "L1PSRAM",
93 base: 0x11E00000,
94 len: 0x00008000,
95 space: "code",
96 access: "RWX"
97 }],
98
99 ["L1DSRAM", {
100 comment: "Internal 32KB L1 data memory",
101 name: "L1DSRAM",
102 base: 0x11F00000,
103 len: 0x00008000,
104 space: "data",
105 access: "RW"
106 }],
107 ];
108 };
109 /*
110 * @(#) ti.catalog.c6000; 1, 0, 0, 0,295; 12-3-2010 11:44:08; /db/ztree/library/trees/platform/platform-l29x/src/
111 */
112