1 /*
2 * Copyright (c) 2010 by Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * */
12
13 /*
14 * ======== TMS320CF761990.xdc ========
15 *
16 */
17 package ti.catalog.c6000;
18
19 /*!
20 * ======== TMS320CF761990 ========
21 * The C64P device data sheet module.
22 *
23 * This module implements the xdc.platform.ICpuDataSheet interface and is
24 * used by platforms to obtain "data sheet" information about this device.
25 */
26 metaonly module TMS320CF761990 inherits ti.catalog.ICpuDataSheet
27 {
28
29 config long cacheSizeL1[string] = [
30 ["0k", 0x0000],
31 ["4k", 0x1000],
32 ["8k", 0x2000],
33 ["16k", 0x4000],
34 ["32k", 0x8000],
35 ];
36
37 config long cacheSizeL2[string] = [
38 ["0k", 0x00000],
39 ["32k", 0x08000],
40 ["64k", 0x10000]
41 ];
42
43 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
44 ['l1PMode',{desc:"L1P Cache",
45 base: 0x11E08000,
46 map : [["0k",0x0000],
47 ["4k",0x1000],
48 ["8k",0x2000],
49 ["16k",0x4000],
50 ["32k",0x8000]],
51 defaultValue: "32k",
52 memorySection: "L1PSRAM"}],
53
54 ['l1DMode',{desc:"L1D Cache",
55 base: 0x11F04000,
56 map : [["0k",0x0000],
57 ["4k",0x1000],
58 ["8k",0x2000],
59 ["16k",0x4000],
60 ["32k",0x8000]],
61 defaultValue: "32k",
62 memorySection: "L1DSRAM"}],
63
64 ['l2Mode',{desc:"L2 Cache",
65 base: 0x11800000,
66 map : [["0k",0x0000],
67 ["32k",0x8000],
68 ["64k",0x10000]],
69 defaultValue: "0k",
70 memorySection: "IRAM"}],
71
72 ];
73
74 instance:
75 override config int minProgUnitSize = 1;
76 override config int minDataUnitSize = 1;
77 override config int dataWordSize = 4;
78
79 override config string cpuCore = "F761990";
80 override config string isa = "64P";
81 override config string cpuCoreRevision = "1.0";
82
83 config xdc.platform.IPlatform.Memory memMap[string] = [
84 ["IRAM", {
85 comment: "Internal 64KB L2 UMAP0 memory",
86 name: "IRAM",
87 base: 0x11800000,
88 len: 0x00010000,
89 space: "code/data",
90 access: "RWX"
91 }],
92
93 ["L1PSRAM", {
94 comment: "Internal 32KB L1 program memory",
95 name: "L1PSRAM",
96 base: 0x11E08000,
97 len: 0x00008000,
98 space: "code",
99 access: "RWX"
100 }],
101
102 ["L1DSRAM", {
103 comment: "Internal 80KB L1 data memory",
104 name: "L1DSRAM",
105 base: 0x11F04000,
106 len: 0x00014000,
107 space: "data",
108 access: "RW"
109 }],
110
111 ["ARM_RAM0", {
112 comment: "Internal ARM RAM instruction memory",
113 name: "ARM_RAM0",
114 base: 0x02000000,
115 len: 0x00008000,
116 space: "code",
117 access: "RWX"
118 }],
119
120 ["ARM_RAM1", {
121 comment: "Internal ARM RAM data memory",
122 name: "ARM_RAM1",
123 base: 0x02008000,
124 len: 0x00004000,
125 space: "data",
126 access: "RW"
127 }],
128 ];
129 };
130 /*
131 * @(#) ti.catalog.c6000; 1, 0, 0, 0,295; 12-3-2010 11:44:08; /db/ztree/library/trees/platform/platform-l29x/src/
132 */
133