1 2 3 4 5 6 7 8 9 10 11
12
13 14 15 16
17 package ti.catalog.c6000;
18
19 /*!
20 * ======== ITMS320C64_128K ========
21 * An interface implemented by all TMS320C64xx devices with 128KB of internal
22 * memory.
23 *
24 * This interface is defined to factor common data about this family into
25 * a single place; all TMS320C64xx devices with 128KB of internal
26 * memory extend this interface.
27 */
28 metaonly interface ITMS320C64_128K inherits ti.catalog.ICpuDataSheet
29 {
30
31 config long cacheSize[string] = [
32 ["4-way cache (0k)", 0x00000],
33 ["4-way cache (32k)", 0x08000],
34 ["4-way cache (64k)", 0x10000],
35 ["4-way cache (128k)", 0x20000],
36 ["0k", 0x00000],
37 ["32k", 0x08000],
38 ["64k", 0x10000],
39 ["128k", 0x20000],
40 ];
41
42 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
43 ['l2Mode',{desc:"L2 Cache",
44 map : [["4-way cache (0k)",0x0000],
45 ["4-way cache (32k)",0x8000],
46 ["4-way cache (64k)",0x10000],
47 ["4-way cache (128k)",0x20000]],
48 defaultValue: "4-way cache (0k)",
49 memorySection: "IRAM"}]
50 ];
51
52 instance:
53 override config int minProgUnitSize = 1;
54 override config int minDataUnitSize = 1;
55 override config int dataWordSize = 4;
56
57 override config string cpuCore = "6400";
58 override config string isa = "64";
59 override config string cpuCoreRevision = "1.0";
60
61 /*!
62 * ======== memMap ========
63 * The default memory map for this device
64 */
65 config xdc.platform.IPlatform.Memory memMap[string] = [
66 ["IRAM", {
67 name: "IRAM",
68 comment: "Internal L2 memory",
69 base: 0x00000,
70 len: 0x20000,
71 space: "code/data",
72 access: "RWX"
73 }],
74 ];
75 }
76 77 78
79