1 2 3 4 5 6 7 8 9 10 11
12
13 14 15 16
17
18 /*!
19 * ======== ITI8148 ========
20 * An interface implemented by all TI8148 devices
21 *
22 * This interface is defined to factor common data about all TI8148 type devices
23 * into a single place; they all have the same internal memory.
24 */
25 metaonly interface ITI8148 inherits ti.catalog.ICpuDataSheet
26 {
27 instance:
28 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
29 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp1;
30 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp2;
31
32 override config string cpuCore = "CM3";
33 override config string isa = "v7M";
34 override config string cpuCoreRevision = "1.0";
35 override config int minProgUnitSize = 1;
36 override config int minDataUnitSize = 1;
37 override config int dataWordSize = 4;
38
39 /*!
40 * ======== memMap ========
41 * The memory map returned be getMemoryMap().
42 */
43 config xdc.platform.IPlatform.Memory memMap[string] = [
44
45 46 47 48
49 ["L2_ROM", {
50 name: "L2_ROM",
51 base: 0x00000000,
52 len: 0x00004000
53 }],
54
55 56 57 58 59
60 ["L2_RAM", {
61 name: "L2_RAM",
62 base: 0x20000000,
63 len: 0x00040000
64 }],
65 ];
66 };
67 68 69
70