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17 package ti.platforms.simCM3;
18
19 /*!
20 * ======== Platform ========
21 * Simulation-based Platform support for TI Cortex M3 platforms
22 *
23 * This module implements xdc.platform.IPlatform and defines configuration
24 * parameters that correspond to this platform's Cpu's, Board's, etc.
25 *
26 * The configuration parameters are initialized in this package's
27 * configuration script (package.cfg) and "bound" to the TCOM object
28 * model. Once they are part of the model, these parameters are
29 * queried by a program's configuration script.
30 *
31 * This particular platform has a single Cpu, and therefore, only
32 * declares a single CPU configuration object. Multi-CPU platforms
33 * would declare multiple Cpu configuration parameters (one per
34 * platform CPU).
35 */
36 metaonly module Platform inherits xdc.platform.IPlatform
37 {
38 /*!
39 * ======== BOARD ========
40 * This platform's board attributes
41 */
42 readonly config xdc.platform.IPlatform.Board BOARD = {
43 id: "0",
44 boardName: "simCM3",
45 boardFamily: "simCM3",
46 boardRevision: null
47 };
48
49 /*!
50 * ======== CPU ========
51 * The CPU simulated by this platform.
52 *
53 * The device simulated is determined by the platform instance name
54 * or if this does not name a ti.catalog.arm module, then we
55 * we simulate a TMS470.
56 */
57 readonly config xdc.platform.IExeContext.Cpu CPU = {
58 id: "0",
59 clockRate: 200.0,
60 catalogName: "ti.catalog.arm",
61 deviceName: "CortexM3",
62 revision: "1.0",
63 };
64
65 instance:
66
67 override readonly config xdc.platform.IPlatform.Memory
68 externalMemoryMap[string] = [
69
70 ["Code", {
71 comment: "Code Memory",
72 name: "Code",
73 base: 0x00000000,
74 len: 0x20000000,
75 space: "code",
76 access: "RWX"
77 }],
78
79 ["SRAM", {
80 comment: "Shared RAM",
81 name: "SRAM",
82 base: 0x20000000,
83 len: 0x20000000,
84 space: "data",
85 access: "RW"
86 }],
87 ];
88
89 override config string codeMemory = "Code";
90 override config string dataMemory = "SRAM";
91 override config string stackMemory = "SRAM";
92 };
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