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18 /*!
19 * ======== TMS320CDRA447 ========
20 * The DRA447 device data sheet module.
21 *
22 * This module implements the xdc.platform.ICpuDataSheet interface and is
23 * used by platforms to obtain "data sheet" information about this device.
24 */
25 metaonly module TMS320CDRA447 inherits ITMS320CDRA44x
26 {
27
28 override config long cacheSizeL2[string] = [
29 ["0k", 0x00000],
30 ["32k", 0x08000],
31 ["64k", 0x10000],
32 ["128k", 0x20000]
33 ];
34
35 override readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
36 ['l1PMode',{desc:"L1P Cache",
37 map : [["0k",0x0000],
38 ["4k",0x1000],
39 ["8k",0x2000],
40 ["16k",0x4000],
41 ["32k",0x8000]],
42 defaultValue: "0k",
43 memorySection: "L1PSRAM"}],
44
45 ['l1DMode',{desc:"L1D Cache",
46 map : [["0k",0x0000],
47 ["4k",0x1000],
48 ["8k",0x2000],
49 ["16k",0x4000],
50 ["32k",0x8000]],
51 defaultValue: "0k",
52 memorySection: "L1DSRAM"}],
53
54 ['l2Mode',{desc:"L2 Cache",
55 map : [["0k",0x0000],
56 ["32k",0x8000],
57 ["64k",0x10000],
58 ],
59 defaultValue: "0k",
60 memorySection: "IRAM"}],
61
62 ];
63
64 instance:
65
66 /*!
67 * ======== memMap ========
68 * The default memory map for this device
69 */
70 override config xdc.platform.IPlatform.Memory memMap[string] = [
71 ["IRAM", {
72 comment: "Internal 128KB UMAP0 memory",
73 name: "IRAM",
74 base: 0x11800000,
75 len: 0x00020000,
76 space: "code/data",
77 access: "RWX"
78 }],
79
80 ["L1PSRAM", {
81 comment: "Internal 32KB RAM/CACHE L1 program memory",
82 name: "L1PSRAM",
83 base: 0x11E08000,
84 len: 0x00008000,
85 space: "code",
86 access: "RWX"
87 }],
88
89 ["L1DSRAM", {
90 comment: "Internal 80KB RAM/CACHE L1 data memory",
91 name: "L1DSRAM",
92 base: 0x11F04000,
93 len: 0x00014000,
94 space: "data",
95 access: "RW"
96 }],
97
98 ["ARM_RAM", {
99 comment: "Internal ARM RAM memory",
100 name: "ARM_RAM",
101 base: 0x10008000,
102 len: 0x00004000,
103 space: "data",
104 access: "RW"
105 }],
106 ];
107
108 };
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