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17 package ti.catalog.c6000;
18
19 /*!
20 * ======== ITMS320C6x1x ========
21 * An interface implemented by all TMS320C6x1x devices.
22 *
23 * This interface is defined to factor common data about this family into
24 * a single place; all TMS320C6x1x devices extend this interface.
25 */
26 metaonly interface ITMS320C6x1x inherits ti.catalog.ICpuDataSheet
27 {
28 config long cacheSize[string] = [
29 ["SRAM", 0x0000],
30 ["1-way cache", 0x4000],
31 ["2-way cache", 0x8000],
32 ["3-way cache", 0xc000],
33 ["4-way cache", 0x10000],
34 ];
35
36 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
37 ['l2Mode',{desc:"L2 Cache",
38 map : [["SRAM",0x0000],
39 ["1-way cache",0x4000],
40 ["2-way cache",0x8000],
41 ["3-way cache",0xc000],
42 ["4-way cache",0x10000]],
43 defaultValue: "4-way cache",
44 memorySection: "IRAM"}]
45 ];
46
47 instance:
48 override config string cpuCoreRevision = "1.0";
49
50 override config int minProgUnitSize = 1;
51 override config int minDataUnitSize = 1;
52 override config int dataWordSize = 4;
53
54 /*!
55 * ======== memMap ========
56 * The default memory map for this device
57 */
58 config xdc.platform.IPlatform.Memory memMap[string];
59 }
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