1    /*
     2     *  Copyright (c) 2010 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== ITMS320C64_256K.xdc ========
    15     *
    16     */
    17    package ti.catalog.c6000;
    18    
    19    /*!
    20     *  ======== ITMS320C64_256K ========
    21     *  An interface implemented by all TMS320C64xx devices with 256KB of internal
    22     *  memory.
    23     *
    24     *  This interface is defined to factor common data about this family into
    25     *  a single place; all TMS320C64xx devices with 256KB of internal
    26     *  memory extend this interface.
    27     */
    28    metaonly interface ITMS320C64_256K inherits ti.catalog.ICpuDataSheet
    29    {
    30    
    31        config long cacheSize[string] = [
    32            ["4-way cache (0k)",   0x00000],
    33            ["4-way cache (32k)",  0x08000],
    34            ["4-way cache (64k)",  0x10000],
    35            ["4-way cache (128k)", 0x20000],
    36            ["4-way cache (256k)", 0x40000],
    37        ];
    38    
    39        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    40             ['l2Mode',{desc:"L2 Cache",
    41                         map : [["4-way cache (0k)",0x0000],
    42                                ["4-way cache (32k)",0x8000],
    43                                ["4-way cache (64k)",0x10000],
    44                                ["4-way cache (128k)",0x20000],
    45                                ["4-way cache (256k)",0x40000]],
    46                         defaultValue: "4-way cache (0k)",
    47                         memorySection: "IRAM"}]
    48        ];
    49    
    50    instance:
    51        override config int     minProgUnitSize = 1;
    52        override config int     minDataUnitSize = 1;    
    53        override config int     dataWordSize    = 4;
    54        
    55        override config string   cpuCore        = "6400";
    56        override config string   isa = "64";
    57        override config string   cpuCoreRevision = "1.0";
    58    
    59        /*!
    60         *  ======== memMap ========
    61         *  The default memory map for this device
    62         */
    63        config xdc.platform.IPlatform.Memory memMap[string]  = [
    64            ["IRAM", {
    65                name:       "IRAM",
    66                comment:    "Internal L2 memory",
    67                base:       0x00000,
    68                len:        0x40000,
    69                space:      "code/data",
    70                access:     "RWX"
    71            }],
    72        ];
    73    }
    74    /*
    75     *  @(#) ti.catalog.c6000; 1, 0, 0, 0,276; 8-7-2010 18:18:08; /db/ztree/library/trees/platform/platform-l20x/src/
    76     */
    77