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17 package ti.catalog.c6000;
18
19 /*!
20 * ======== ITMS320C64_1M ========
21 * An interface implemented by all TMS320C64xx devices with 1MB of internal
22 * memory.
23 *
24 * This interface is defined to factor common data about this family into
25 * a single place; all TMS320C64xx devices with 1MB of internal
26 * memory extend this interface.
27 */
28 metaonly interface ITMS320C64_1M inherits ti.catalog.ICpuDataSheet
29 {
30
31 config long cacheSize[string] = [
32 ["4-way cache (0k)", 0x00000],
33 ["4-way cache (32k)", 0x08000],
34 ["4-way cache (64k)", 0x10000],
35 ["4-way cache (128k)", 0x20000],
36 ["4-way cache (256k)", 0x40000],
37 ];
38
39 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
40 ['l2Mode',{desc:"L2 Cache",
41 map : [["4-way cache (0k)",0x0000],
42 ["4-way cache (32k)",0x8000],
43 ["4-way cache (64k)",0x10000],
44 ["4-way cache (128k)",0x20000],
45 ["4-way cache (256k)",0x40000]],
46 defaultValue: "4-way cache (0k)",
47 memorySection: "IRAM"}]
48 ];
49
50
51 instance:
52 override config int minProgUnitSize = 1;
53 override config int minDataUnitSize = 1;
54 override config int dataWordSize = 4;
55
56 override config string cpuCore = "6400";
57 override config string isa = "64";
58 override config string cpuCoreRevision = "1.0";
59
60 /*!
61 * ======== memMap ========
62 * The default memory map for this device
63 */
64 config xdc.platform.IPlatform.Memory memMap[string] = [
65 ["IRAM", {
66 name: "IRAM",
67 comment: "Internal L2 memory",
68 base: 0x000000,
69 len: 0x100000,
70 space: "code/data",
71 access: "RWX"
72 }],
73 ];
74 }
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