1    /*
     2     *  Copyright (c) 2010 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== TMS320CDM6446.xdc ========
    15     *
    16     */
    17    
    18    metaonly module TMS320CDM6446 inherits ti.catalog.ICpuDataSheet
    19    {
    20    instance:
    21        override config string cpuCore           = "Arm9";
    22        override config string isa               = "v5T";
    23        override config string cpuCoreRevision   = "1.0";
    24        override config int    minProgUnitSize   = 1;
    25        override config int    minDataUnitSize   = 1;
    26        override config int    dataWordSize      = 4;
    27    
    28        /*!
    29         *  ======== memMap ========
    30         *  The memory map returned be getMemoryMap().
    31         */
    32        config xdc.platform.IPlatform.Memory memMap[string]  = [
    33            ["IRAM0", {
    34                comment:    "Internal ARM Instruction RAM0",
    35                name:       "IRAM0",
    36                base:       0x00000000,
    37                len:        0x00002000,
    38                space:      "code",
    39                access:     "RWX"
    40            }],
    41    
    42            ["IRAM1", {
    43                comment:    "Internal ARM Instruction RAM1",
    44                name:       "IRAM1",
    45                base:       0x00002000,
    46                len:        0x00002000,
    47                space:      "code",
    48                access:     "RWX"
    49            }],
    50    
    51            ["DRAM0", {
    52                comment:    "Internal ARM Data RAM0",
    53                name:       "DRAM0",
    54                base:       0x00008000,
    55                len:        0x00002000,
    56                space:      "data",
    57                access:     "RW"
    58            }],
    59    
    60            ["DRAM1", {
    61                comment:    "Internal ARM Data RAM1",
    62                name:       "DRAM1",
    63                base:       0x0000A000,
    64                len:        0x00002000,
    65                space:      "data",
    66                access:     "RW"
    67            }],
    68        ];
    69    }
    70    /*
    71     *  @(#) ti.catalog.arm; 1, 0, 1,166; 8-7-2010 18:18:05; /db/ztree/library/trees/platform/platform-l20x/src/
    72     */
    73