1 /* --COPYRIGHT--,EPL
2 * Copyright (c) 2008 Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * --/COPYRIGHT--*/
12
13 /*
14 * ======== IMSP430F54xx.xdc ========
15 * Common definitions for MSP430F54xx devices
16 *
17 * This device can load code for different MSP430 ISAs - `MSP430` and
18 * `MSP430X`. The parameter `{@link #isa}` is set to a JavaScript regular
19 * expression that covers different MSP430 ISAs.
20 *
21 *! Revision History
22 *! ================
23 *! 31-Oct-2009 sg Created.
24 */
25
26 metaonly interface IMSP430F54xx inherits IMSP430
27 {
28
29 instance:
30
31 override config string cpuCore = "MSP430X";
32 override config string isa = "430.*";
33
34 config ti.catalog.msp430.peripherals.timer.Timer_A5.Instance TA0;
35 config ti.catalog.msp430.peripherals.timer.Timer_A3.Instance TA1;
36 config ti.catalog.msp430.peripherals.timer.Timer_B7.Instance TB0;
37
38 /*!
39 * ======== commonMap ========
40 * Memory map elements shared by all MSP430F54xx devices
41 */
42 config xdc.platform.IPlatform.Memory commonMap[string] = [
43
44 ["PERIPHERALS", {
45 comment: "Memory mapped peripherals",
46 name: "PERIPHERALS",
47 base: 0x0,
48 len: 0x1000,
49 space: "io",
50 access: "RW"
51 }],
52
53 ["BSL", {
54 comment: "Bootstrap loader (flash)",
55 name: "BSL",
56 base: 0x1000,
57 len: 0x800,
58 space: "code",
59 access: "RW"
60 }],
61
62 ["INFO", {
63 comment: "Information memory (flash)",
64 name: "INFO",
65 base: 0x1800,
66 len: 0x200,
67 space: "data",
68 access: "RW"
69 }],
70
71 ["INT00", {
72 comment: "Reserved Vector",
73 name: "INT00",
74 base: 0xFF80,
75 len: 0x2,
76 space: "data"
77 }],
78
79 ["INT01", {
80 comment: "Reserved Vector",
81 name: "INT01",
82 base: 0xFF82,
83 len: 0x2,
84 space: "data"
85 }],
86
87 ["INT02", {
88 comment: "Reserved Vector",
89 name: "INT02",
90 base: 0xFF84,
91 len: 0x2,
92 space: "data"
93 }],
94
95 ["INT03", {
96 comment: "Reserved Vector",
97 name: "INT03",
98 base: 0xFF86,
99 len: 0x2,
100 space: "data"
101 }],
102
103 ["INT04", {
104 comment: "Reserved Vector",
105 name: "INT04",
106 base: 0xFF88,
107 len: 0x2,
108 space: "data"
109 }],
110
111 ["INT05", {
112 comment: "Reserved Vector",
113 name: "INT05",
114 base: 0xFF8A,
115 len: 0x2,
116 space: "data"
117 }],
118
119 ["INT06", {
120 comment: "Reserved Vector",
121 name: "INT06",
122 base: 0xFF8C,
123 len: 0x2,
124 space: "data"
125 }],
126
127 ["INT07", {
128 comment: "Reserved Vector",
129 name: "INT07",
130 base: 0xFF8E,
131 len: 0x2,
132 space: "data"
133 }],
134
135 ["INT08", {
136 comment: "Reserved Vector",
137 name: "INT08",
138 base: 0xFF90,
139 len: 0x2,
140 space: "data"
141 }],
142
143 ["INT09", {
144 comment: "Reserved Vector",
145 name: "INT09",
146 base: 0xFF92,
147 len: 0x2,
148 space: "data"
149 }],
150
151 ["INT10", {
152 comment: "Reserved Vector",
153 name: "INT10",
154 base: 0xFF94,
155 len: 0x2,
156 space: "data"
157 }],
158
159 ["INT11", {
160 comment: "Reserved Vector",
161 name: "INT11",
162 base: 0xFF96,
163 len: 0x2,
164 space: "data"
165 }],
166
167 ["INT12", {
168 comment: "Reserved Vector",
169 name: "INT12",
170 base: 0xFF98,
171 len: 0x2,
172 space: "data"
173 }],
174
175 ["INT13", {
176 comment: "Reserved Vector",
177 name: "INT13",
178 base: 0xFF9A,
179 len: 0x2,
180 space: "data"
181 }],
182
183 ["INT14", {
184 comment: "Reserved Vector",
185 name: "INT14",
186 base: 0xFF9C,
187 len: 0x2,
188 space: "data"
189 }],
190
191 ["INT15", {
192 comment: "Reserved Vector",
193 name: "INT15",
194 base: 0xFF9E,
195 len: 0x2,
196 space: "data"
197 }],
198
199 ["INT16", {
200 comment: "Reserved Vector",
201 name: "INT16",
202 base: 0xFFA0,
203 len: 0x2,
204 space: "data"
205 }],
206
207 ["INT17", {
208 comment: "Reserved Vector",
209 name: "INT17",
210 base: 0xFFA2,
211 len: 0x2,
212 space: "data"
213 }],
214
215 ["INT18", {
216 comment: "Reserved Vector",
217 name: "INT18",
218 base: 0xFFA4,
219 len: 0x2,
220 space: "data"
221 }],
222
223 ["INT19", {
224 comment: "Reserved Vector",
225 name: "INT19",
226 base: 0xFFA6,
227 len: 0x2,
228 space: "data"
229 }],
230
231 ["INT20", {
232 comment: "Reserved Vector",
233 name: "INT20",
234 base: 0xFFA8,
235 len: 0x2,
236 space: "data"
237 }],
238
239 ["INT21", {
240 comment: "Reserved Vector",
241 name: "INT21",
242 base: 0xFFAA,
243 len: 0x2,
244 space: "data"
245 }],
246
247 ["INT22", {
248 comment: "Reserved Vector",
249 name: "INT22",
250 base: 0xFFAC,
251 len: 0x2,
252 space: "data"
253 }],
254
255 ["INT23", {
256 comment: "Reserved Vector",
257 name: "INT23",
258 base: 0xFFAE,
259 len: 0x2,
260 space: "data"
261 }],
262
263 ["INT24", {
264 comment: "Reserved Vector",
265 name: "INT24",
266 base: 0xFFB0,
267 len: 0x2,
268 space: "data"
269 }],
270
271 ["INT25", {
272 comment: "Reserved Vector",
273 name: "INT25",
274 base: 0xFFB2,
275 len: 0x2,
276 space: "data"
277 }],
278
279 ["INT26", {
280 comment: "Reserved Vector",
281 name: "INT26",
282 base: 0xFFB4,
283 len: 0x2,
284 space: "data"
285 }],
286
287 ["INT27", {
288 comment: "Reserved Vector",
289 name: "INT27",
290 base: 0xFFB6,
291 len: 0x2,
292 space: "data"
293 }],
294
295 ["INT28", {
296 comment: "Reserved Vector",
297 name: "INT28",
298 base: 0xFFB8,
299 len: 0x2,
300 space: "data"
301 }],
302
303 ["INT29", {
304 comment: "Reserved Vector",
305 name: "INT29",
306 base: 0xFFBA,
307 len: 0x2,
308 space: "data"
309 }],
310
311 ["INT30", {
312 comment: "Reserved Vector",
313 name: "INT30",
314 base: 0xFFBC,
315 len: 0x2,
316 space: "data"
317 }],
318
319 ["INT31", {
320 comment: "Reserved Vector",
321 name: "INT31",
322 base: 0xFFBE,
323 len: 0x2,
324 space: "data"
325 }],
326
327 ["INT32", {
328 comment: "Reserved Vector",
329 name: "INT32",
330 base: 0xFFC0,
331 len: 0x2,
332 space: "data"
333 }],
334
335 ["INT33", {
336 comment: "Reserved Vector",
337 name: "INT33",
338 base: 0xFFC2,
339 len: 0x2,
340 space: "data"
341 }],
342
343 ["INT34", {
344 comment: "Reserved Vector",
345 name: "INT34",
346 base: 0xFFC4,
347 len: 0x2,
348 space: "data"
349 }],
350
351 ["INT35", {
352 comment: "Reserved Vector",
353 name: "INT35",
354 base: 0xFFC6,
355 len: 0x2,
356 space: "data"
357 }],
358
359 ["INT36", {
360 comment: "Reserved Vector",
361 name: "INT36",
362 base: 0xFFC8,
363 len: 0x2,
364 space: "data"
365 }],
366
367 ["INT37", {
368 comment: "Reserved Vector",
369 name: "INT37",
370 base: 0xFFCA,
371 len: 0x2,
372 space: "data"
373 }],
374
375 ["INT38", {
376 comment: "Reserved Vector",
377 name: "INT38",
378 base: 0xFFCC,
379 len: 0x2,
380 space: "data"
381 }],
382
383 ["INT39", {
384 comment: "Reserved Vector",
385 name: "INT39",
386 base: 0xFFCE,
387 len: 0x2,
388 space: "data"
389 }],
390
391 ["INT40", {
392 comment: "Reserved Vector",
393 name: "INT40",
394 base: 0xFFD0,
395 len: 0x2,
396 space: "data"
397 }],
398
399 ["INT41", {
400 comment: "RTC_A Vector",
401 name: "INT41",
402 base: 0xFFD2,
403 len: 0x2,
404 space: "data"
405 }],
406
407 ["INT42", {
408 comment: "I/O Port P2 Vector",
409 name: "INT42",
410 base: 0xFFD4,
411 len: 0x2,
412 space: "data"
413 }],
414
415 ["INT43", {
416 comment: "USCI_B3 Receive/Transmit Vector",
417 name: "INT43",
418 base: 0xFFD6,
419 len: 0x2,
420 space: "data"
421 }],
422
423 ["INT44", {
424 comment: "USCI_A3 Receive/Transmit Vector",
425 name: "INT44",
426 base: 0xFFD8,
427 len: 0x2,
428 space: "data"
429 }],
430
431 ["INT45", {
432 comment: "USCI_B1 Receive/Transmit Vector",
433 name: "INT45",
434 base: 0xFFDA,
435 len: 0x2,
436 space: "data"
437 }],
438
439 ["INT46", {
440 comment: "USCI_A1 Receive/Transmit Vector",
441 name: "INT46",
442 base: 0xFFDC,
443 len: 0x2,
444 space: "data"
445 }],
446
447 ["INT47", {
448 comment: "I/O Port P1 Vector",
449 name: "INT47",
450 base: 0xFFDE,
451 len: 0x2,
452 space: "data"
453 }],
454
455 ["INT48", {
456 comment: "TA1 CCR1-CCR2 Vector",
457 name: "INT48",
458 base: 0xFFE0,
459 len: 0x2,
460 space: "data"
461 }],
462
463 ["INT49", {
464 comment: "TA1 CCR0 Vector",
465 name: "INT49",
466 base: 0xFFE2,
467 len: 0x2,
468 space: "data"
469 }],
470
471 ["INT50", {
472 comment: "DMA Vector",
473 name: "INT50",
474 base: 0xFFE4,
475 len: 0x2,
476 space: "data"
477 }],
478
479 ["INT51", {
480 comment: "USCI_B2 Receive/Transmit Vector",
481 name: "INT51",
482 base: 0xFFE6,
483 len: 0x2,
484 space: "data"
485 }],
486
487 ["INT52", {
488 comment: "USCI_A2 Receive/Transmit Vector",
489 name: "INT52",
490 base: 0xFFE8,
491 len: 0x2,
492 space: "data"
493 }],
494
495 ["INT53", {
496 comment: "TA0 CCR1-CCR4 Vector",
497 name: "INT53",
498 base: 0xFFEA,
499 len: 0x2,
500 space: "data"
501 }],
502
503 ["INT54", {
504 comment: "TA0 CCR0 Vector",
505 name: "INT54",
506 base: 0xFFEC,
507 len: 0x2,
508 space: "data"
509 }],
510
511 ["INT55", {
512 comment: "ADC12_A Vector",
513 name: "INT55",
514 base: 0xFFEE,
515 len: 0x2,
516 space: "data"
517 }],
518
519 ["INT56", {
520 comment: "USCI_B0 Receive/Transmit Vector",
521 name: "INT56",
522 base: 0xFFF0,
523 len: 0x2,
524 space: "data"
525 }],
526
527 ["INT57", {
528 comment: "USCI_A0 Receive/Transmit Vector",
529 name: "INT57",
530 base: 0xFFF2,
531 len: 0x2,
532 space: "data"
533 }],
534
535 ["INT58", {
536 comment: "Watchdog Timer_A Interval Timer Mode Vector",
537 name: "INT58",
538 base: 0xFFF4,
539 len: 0x2,
540 space: "data"
541 }],
542
543 ["INT59", {
544 comment: "TB0 CCR1-CCR6 Vector",
545 name: "INT59",
546 base: 0xFFF6,
547 len: 0x2,
548 space: "data"
549 }],
550
551 ["INT60", {
552 comment: "TB0 CCR0 Vector",
553 name: "INT60",
554 base: 0xFFF8,
555 len: 0x2,
556 space: "data"
557 }],
558
559 ["INT61", {
560 comment: "User NMI Vector",
561 name: "INT61",
562 base: 0xFFFA,
563 len: 0x2,
564 space: "data"
565 }],
566
567 ["INT62", {
568 comment: "System NMI Vector",
569 name: "INT62",
570 base: 0xFFFC,
571 len: 0x2,
572 space: "data"
573 }],
574
575 ["RESET", {
576 comment: "Reset Vector",
577 name: "RESET",
578 base: 0xFFFE,
579 len: 0x2,
580 space: "data"
581 }],
582 ];
583 }