1    /*
     2     *  Copyright (c) 2009 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== Boot.xdc ========
    15     *
    16     */
    17    
    18    package ti.catalog.arm.lm3init;
    19    
    20    import xdc.rov.ViewInfo;
    21    
    22    @Template("./Boot.xdt")
    23    
    24    metaonly module Boot
    25    {
    26        metaonly struct ModuleView {
    27            Bool    configureClock;
    28            Bool    sysClockDivEnable;
    29            String  sysClockDiv;
    30            Bool    pwmClockDivEnable;
    31            String  pwmClockDiv;
    32            String  xtal;
    33            String  oscSrc;
    34            Bool    pllBypass;
    35            Bool    pllOutEnable;
    36            Bool    ioscDisable;
    37            Bool    moscDisable;
    38            Bool    configureLdo;
    39            String  ldoOut;
    40        }
    41    
    42        @Facet
    43        metaonly config ViewInfo.Instance rovViewInfo = 
    44            ViewInfo.create({
    45                viewMap: [
    46                [
    47                    'Module',
    48                    {
    49                        type: ViewInfo.MODULE,
    50                        viewInitFxn: 'viewInitModule',
    51                        structName: 'ModuleView'
    52                    }
    53                ],
    54                ]
    55            });
    56        
    57    
    58        enum SysDiv {
    59            SYSDIV_1     = 0x00000000,  /* System clock /1 */
    60            SYSDIV_2     = 0x00800000,  /* System clock /2 */
    61            SYSDIV_3     = 0x01000000,  /* System clock /3 */
    62            SYSDIV_4     = 0x01800000,  /* System clock /4 */
    63            SYSDIV_5     = 0x02000000,  /* System clock /5 */
    64            SYSDIV_6     = 0x02800000,  /* System clock /6 */
    65            SYSDIV_7     = 0x03000000,  /* System clock /7 */
    66            SYSDIV_8     = 0x03800000,  /* System clock /8 */
    67            SYSDIV_9     = 0x04000000,  /* System clock /9 */
    68            SYSDIV_10    = 0x04800000,  /* System clock /10 */
    69            SYSDIV_11    = 0x05000000,  /* System clock /11 */
    70            SYSDIV_12    = 0x05800000,  /* System clock /12 */
    71            SYSDIV_13    = 0x06000000,  /* System clock /13 */
    72            SYSDIV_14    = 0x06800000,  /* System clock /14 */
    73            SYSDIV_15    = 0x07000000,  /* System clock /15 */
    74            SYSDIV_16    = 0x07800000   /* System clock /16 */
    75        }
    76    
    77        enum PwmDiv {
    78            PWMDIV_2     = 0x00000000,  /* PWM clock /2 */
    79            PWMDIV_4     = 0x00020000,  /* PWM clock /4 */
    80            PWMDIV_8     = 0x00040000,  /* PWM clock /8 */
    81            PWMDIV_16    = 0x00060000,  /* PWM clock /16 */
    82            PWMDIV_32    = 0x00080000,  /* PWM clock /32 */
    83            PWMDIV_64    = 0x000A0000   /* PWM clock /64 */
    84        }
    85    
    86        enum XtalFreq {
    87            XTAL_1MHZ    = 0x00000000,  /* Using a 1MHz crystal */
    88            XTAL_1_84MHZ = 0x00000040,  /* Using a 1.8432MHz crystal */
    89            XTAL_2MHZ    = 0x00000080,  /* Using a 2MHz crystal */
    90            XTAL_2_45MHZ = 0x000000C0,  /* Using a 2.4576MHz crystal */
    91            XTAL_3_57MHZ = 0x00000100,  /* Using a 3.579545MHz crystal */
    92            XTAL_3_68MHZ = 0x00000140,  /* Using a 3.6864MHz crystal */
    93            XTAL_4MHZ    = 0x00000180,  /* Using a 4MHz crystal */
    94            XTAL_4_09MHZ = 0x000001C0,  /* Using a 4.096MHz crystal */
    95            XTAL_4_91MHZ = 0x00000200,  /* Using a 4.9152MHz crystal */
    96            XTAL_5MHZ    = 0x00000240,  /* Using a 5MHz crystal */
    97            XTAL_5_12MHZ = 0x00000280,  /* Using a 5.12MHz crystal */
    98            XTAL_6MHZ    = 0x000002C0,  /* Using a 6MHz crystal */
    99            XTAL_6_14MHZ = 0x00000300,  /* Using a 6.144MHz crystal */
   100            XTAL_7_37MHZ = 0x00000340,  /* Using a 7.3728MHz crystal */
   101            XTAL_8MHZ    = 0x00000380,  /* Using a 8MHz crystal */
   102            XTAL_8_19MHZ = 0x000003C0,  /* Using a 8.192MHz crystal */
   103            XTAL_10MHZ   = 0x00000400,  /* 10.0 MHz (USB) */
   104            XTAL_12MHZ   = 0x00000440,  /* 12.0 MHz (USB) */
   105            XTAL_12_2MHZ = 0x00000480,  /* 12.288 MHz */
   106            XTAL_13_5MHZ = 0x000004C0,  /* 13.56 MHz */
   107            XTAL_14_3MHZ = 0x00000500,  /* 14.31818 MHz */
   108            XTAL_16MHZ   = 0x00000540,  /* 16.0 MHz (USB) */
   109            XTAL_16_3MHZ = 0x00000580   /* 16.384 MHz */
   110        }
   111    
   112        enum OscSrc {
   113            OSCSRC_MAIN  = 0x00000000,  /* Use the main oscillator */
   114            OSCSRC_INT   = 0x00000010,  /* Use the internal oscillator */
   115            OSCSRC_INT4  = 0x00000020,  /* Use the internal oscillator / 4 */
   116            OSCSRC_30    = 0x00000030   /* 30 KHz internal oscillator */
   117        }
   118    
   119        enum LdoOut {
   120            LDOPCTL_2_55V    = 0x0000001F,  /* LDO output of 2.55V */
   121            LDOPCTL_2_60V    = 0x0000001E,  /* LDO output of 2.60V */
   122            LDOPCTL_2_65V    = 0x0000001D,  /* LDO output of 2.65V */
   123            LDOPCTL_2_70V    = 0x0000001C,  /* LDO output of 2.70V */
   124            LDOPCTL_2_75V    = 0x0000001B,  /* LDO output of 2.75V */
   125            LDOPCTL_2_25V    = 0x00000005,  /* LDO output of 2.25V */
   126            LDOPCTL_2_30V    = 0x00000004,  /* LDO output of 2.30V */
   127            LDOPCTL_2_35V    = 0x00000003,  /* LDO output of 2.35V */
   128            LDOPCTL_2_40V    = 0x00000002,  /* LDO output of 2.40V */
   129            LDOPCTL_2_45V    = 0x00000001,  /* LDO output of 2.45V */
   130            LDOPCTL_2_50V    = 0x00000000   /* LDO output of 2.50V */
   131        }
   132    
   133        /*! 
   134         *  Clock configuration flag, default is false.
   135         *
   136         *  Set to true to automatically configure the Clock.
   137         */
   138        config Bool configureClock = false;
   139    
   140        /*! SYS Clock Divide Enable, default is false */
   141        config Bool sysClockDivEnable = false;
   142    
   143        /*! SYS Clock Divisor */
   144        config SysDiv sysClockDiv = SYSDIV_1;
   145    
   146        /*! PWM Clock Divide Enable, default is false */
   147        config Bool pwmClockDivEnable = false;
   148    
   149        /*! PWM Clock Divisor */
   150        config PwmDiv pwmClockDiv = PWMDIV_2;
   151    
   152        /*! Crystal Value */
   153        config XtalFreq xtal = XTAL_1MHZ;
   154    
   155        /*! Oscillator Source */
   156        config OscSrc oscSrc = OSCSRC_MAIN;
   157    
   158        /*! PLL Bypass flag */
   159        config Bool pllBypass = false;
   160    
   161        /*! PLL Output Enable flag */
   162        config Bool pllOutEnable = false;
   163    
   164        /*! Internal Oscillator Disable flag */
   165        config Bool ioscDisable = false;
   166    
   167        /*! Main Oscillator Disable flag */
   168        config Bool moscDisable = false;
   169    
   170        /*! 
   171         *  LDO configuration flag, default is false.
   172         *
   173         *  Set to true to automatically configure the LDO.
   174         */
   175        config Bool configureLdo = false;
   176    
   177        /*! 
   178         *  LDO VADJ setting, default is 2.5V
   179         */
   180        config LdoOut ldoOut = LDOPCTL_2_50V;
   181    
   182        /*! 
   183         *  Code section that Boot module code is in.
   184         *
   185         *  To place this section into a memory segment yourself, add the 
   186         *  following to you configuration file: 
   187         *
   188         *  @p(code)
   189         *  Program.sectMap[Boot.bootCodeSection] = new Program.SectionSpec();
   190         *  Program.sectMap[Boot.bootCodeSection].loadSegment = "yourBootCodeMemorySegment";
   191         *  @p
   192         *
   193         *  or to place the code at a specific address: 
   194         *
   195         *  @p(code)
   196         *  Program.sectMap[Boot.bootCodeSection] = new Program.SectionSpec();
   197         *  Program.sectMap[Boot.bootCodeSection].loadAdress = yourBootCodeAddress;
   198         *  @p
   199         *
   200         */
   201        readonly config String bootCodeSection = ".bootCodeSection";
   202    
   203        /*! 
   204         *  @_nodoc
   205         *  computed RCC value based on settings
   206         */
   207        config UInt ulConfig;
   208    };
   209    /*
   210     *  @(#) ti.catalog.arm.lm3init; 1, 0, 0,28; 12-9-2009 17:20:12; /db/ztree/library/trees/platform/platform-k27x/src/
   211     */
   212