1 /*
2 * Copyright (c) 2009 by Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * */
12
13 /*
14 * ======== TMS320CDM730.xdc ========
15 *
16 */
17 package ti.catalog.c6000;
18
19 /*!
20 * ======== TMS320CDM730 ========
21 * The C674 device data sheet module.
22 *
23 * This module implements the xdc.platform.ICpuDataSheet interface and is
24 * used by platforms to obtain "data sheet" information about this device.
25 */
26 metaonly module TMS320CDM730 inherits ti.catalog.ICpuDataSheet
27 {
28
29 config long cacheSizeL1[string] = [
30 ["0k", 0x0000],
31 ["4k", 0x1000],
32 ["8k", 0x2000],
33 ["16k", 0x4000],
34 ["32k", 0x8000],
35 ];
36
37 config long cacheSizeL2[string] = [
38 ["0k", 0x00000],
39 ["32k", 0x08000],
40 ["64k", 0x10000],
41 ["128k",0x20000],
42 ];
43
44 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
45 ['l1PMode',{desc:"L1P Cache",
46 map : [["0k",0x0000],
47 ["4k",0x1000],
48 ["8k",0x2000],
49 ["16k",0x4000],
50 ["32k",0x8000]],
51 defaultValue: "0k",
52 memorySection: "L1PSRAM"}],
53
54 ['l1DMode',{desc:"L1D Cache",
55 map : [["0k",0x0000],
56 ["4k",0x1000],
57 ["8k",0x2000],
58 ["16k",0x4000],
59 ["32k",0x8000]],
60 defaultValue: "0k",
61 memorySection: "L1DSRAM"}],
62
63 ['l2Mode',{desc:"L2 Cache",
64 map : [["0k",0x0000],
65 ["32k",0x8000],
66 ["64k",0x10000],
67 ["128k",0x20000]],
68 defaultValue: "0k",
69 memorySection: "IRAM"}],
70
71 ];
72
73 instance:
74 override config int minProgUnitSize = 1;
75 override config int minDataUnitSize = 1;
76 override config int dataWordSize = 4;
77
78 override config string cpuCore = "TMS320CDM730";
79 override config string isa = "674";
80 override config string cpuCoreRevision = "1.0";
81
82 config xdc.platform.IPlatform.Memory memMap[string] = [
83
84 ["IRAM", {
85 comment: "Internal 128KB L2 memory",
86 name: "IRAM",
87 base: 0x10800000,
88 len: 0x00020000,
89 space: "code/data",
90 access: "RWX"
91 }],
92
93 ["L1PSRAM", {
94 comment: "Internal 32KB L1 program memory",
95 name: "L1PSRAM",
96 base: 0x10E00000,
97 len: 0x00008000,
98 space: "code",
99 access: "RWX"
100 }],
101
102 ["L1DSRAM", {
103 comment: "Internal 32KB L1 data memory",
104 name: "L1DSRAM",
105 base: 0x10F00000,
106 len: 0x00008000,
107 space: "data",
108 access: "RW"
109 }],
110 ];
111 };
112 /*
113 * @(#) ti.catalog.c6000; 1, 0, 0, 0,212; 11-19-2009 18:44:13; /db/ztree/library/trees/platform/platform-k26x/src/
114 */
115