1 /* --COPYRIGHT--,EPL
2 * Copyright (c) 2009 by Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * --/COPYRIGHT--*/
12
13 /*
14 * ======== Primus.xdc ========
15 *
16 */
17 package ti.catalog.c6000.nda;
18
19 /*!
20 * ======== Primus ========
21 * The C64P device data sheet module.
22 *
23 * This module implements the xdc.platform.ICpuDataSheet interface and is
24 * used by platforms to obtain "data sheet" information about this device.
25 */
26 metaonly module Primus inherits ti.catalog.ICpuDataSheet
27 {
28
29 config long cacheSizeL1[string] = [
30 ["0k", 0x0000],
31 ["4k", 0x1000],
32 ["8k", 0x2000],
33 ["16k", 0x4000],
34 ["32k", 0x8000],
35 ];
36
37 config long cacheSizeL2[string] = [
38 ["0k", 0x00000],
39 ["32k", 0x08000],
40 ["64k", 0x10000],
41 ["128k",0x20000],
42 ["256k",0x40000],
43 ];
44
45 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
46 ['l1PMode',{desc:"L1P Cache",
47 map : [["0k",0x0000],
48 ["4k",0x1000],
49 ["8k",0x2000],
50 ["16k",0x4000],
51 ["32k",0x8000]],
52 defaultValue: "32k",
53 memorySection: "L1PSRAM"}],
54
55 ['l1DMode',{desc:"L1D Cache",
56 map : [["0k",0x0000],
57 ["4k",0x1000],
58 ["8k",0x2000],
59 ["16k",0x4000],
60 ["32k",0x8000]],
61 defaultValue: "32k",
62 memorySection: "L1DSRAM"}],
63
64 ['l2Mode',{desc:"L2 Cache",
65 map : [["0k",0x0000],
66 ["32k",0x8000],
67 ["64k",0x10000],
68 ["128k", 0x20000],
69 ["256k", 0x40000]],
70 defaultValue: "256k",
71 memorySection: "IRAM"}],
72
73 ];
74
75 instance:
76 override config int minProgUnitSize = 1;
77 override config int minDataUnitSize = 1;
78 override config int dataWordSize = 4;
79
80 override config string cpuCore = "Primus";
81 override config string isa = "64P";
82 override config string cpuCoreRevision = "1.0";
83
84 config xdc.platform.IPlatform.Memory memMap[string] = [
85 ["L2ROM", {
86 comment: "Internal 1MB L2 ROM",
87 name: "IROM",
88 base: 0x11700000,
89 len: 0x00100000,
90 space: "code/data",
91 access: "RX"
92 }],
93
94 ["IRAM", {
95 comment: "Internal 256KB L2 memory",
96 name: "IRAM",
97 base: 0x11800000,
98 len: 0x00040000,
99 space: "code/data",
100 access: "RWX"
101 }],
102
103 ["L1PSRAM", {
104 comment: "Internal 32KB L1 program memory",
105 name: "L1PSRAM",
106 base: 0x11E00000,
107 len: 0x00008000,
108 space: "code",
109 access: "RWX"
110 }],
111
112 ["L1DSRAM", {
113 comment: "Internal 32KB L1 data memory",
114 name: "L1DSRAM",
115 base: 0x11F00000,
116 len: 0x00008000,
117 space: "data",
118 access: "RW"
119 }],
120 ["L3_CBA_RAM", {
121 comment: "128KB ARM/DSP local shared RAM",
122 name: "L3_CBA_RAM",
123 base: 0x80000000,
124 len: 0x00020000,
125 space: "code/data",
126 access: "RWX"
127 }],
128 ];
129 };
130 /*
131 * @(#) ti.catalog.c6000.nda; 1, 0, 0, 0,93; 10-7-2009 15:48:14; /db/ztree/library/trees/platform-k22x/src/
132 */
133