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9
10 11 12 13
14 package ti.catalog.c6000;
15
16 /*!
17 * ======== TMS320CDM740 ========
18 * The C674 device data sheet module.
19 *
20 * This module implements the xdc.platform.ICpuDataSheet interface and is
21 * used by platforms to obtain "data sheet" information about this device.
22 */
23 metaonly module TMS320CDM740 inherits ti.catalog.ICpuDataSheet
24 {
25
26 config long cacheSizeL1[string] = [
27 ["0k", 0x0000],
28 ["4k", 0x1000],
29 ["8k", 0x2000],
30 ["16k", 0x4000],
31 ["32k", 0x8000],
32 ];
33
34 config long cacheSizeL2[string] = [
35 ["0k", 0x00000],
36 ["32k", 0x08000],
37 ["64k", 0x10000],
38 ["128k",0x20000],
39 ];
40
41 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
42 ['l1PMode',{desc:"L1P Cache",
43 map : [["0k",0x0000],
44 ["4k",0x1000],
45 ["8k",0x2000],
46 ["16k",0x4000],
47 ["32k",0x8000]],
48 defaultValue: "0k",
49 memorySection: "L1PSRAM"}],
50
51 ['l1DMode',{desc:"L1D Cache",
52 map : [["0k",0x0000],
53 ["4k",0x1000],
54 ["8k",0x2000],
55 ["16k",0x4000],
56 ["32k",0x8000]],
57 defaultValue: "0k",
58 memorySection: "L1DSRAM"}],
59
60 ['l2Mode',{desc:"L2 Cache",
61 map : [["0k",0x0000],
62 ["32k",0x8000],
63 ["64k",0x10000],
64 ["128k",0x20000]],
65 defaultValue: "0k",
66 memorySection: "IRAM"}],
67
68 ];
69
70 instance:
71 override config int minProgUnitSize = 1;
72 override config int minDataUnitSize = 1;
73 override config int dataWordSize = 4;
74
75 override config string cpuCore = "TMS320CDM740";
76 override config string isa = "674";
77 override config string cpuCoreRevision = "1.0";
78
79 config xdc.platform.IPlatform.Memory memMap[string] = [
80
81 ["IRAM", {
82 comment: "Internal 128KB L2 memory",
83 name: "IRAM",
84 base: 0x10800000,
85 len: 0x00020000,
86 space: "code/data",
87 access: "RWX"
88 }],
89
90 ["L1PSRAM", {
91 comment: "Internal 32KB L1 program memory",
92 name: "L1PSRAM",
93 base: 0x10E00000,
94 len: 0x00008000,
95 space: "code",
96 access: "RWX"
97 }],
98
99 ["L1DSRAM", {
100 comment: "Internal 32KB L1 data memory",
101 name: "L1DSRAM",
102 base: 0x10F00000,
103 len: 0x00008000,
104 space: "data",
105 access: "RW"
106 }],
107 ];
108 };
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112