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14 package ti.catalog.c6000;
15
16 /*!
17 * ======== ITMS320C64_512K ========
18 * An interface implemented by all TMS320C64xx devices with 512KB of internal
19 * memory.
20 *
21 * This interface is defined to factor common data about this family into
22 * a single place; all TMS320C64xx devices with 512KB of internal
23 * memory extend this interface.
24 */
25 metaonly interface ITMS320C64_512K inherits ti.catalog.ICpuDataSheet
26 {
27
28 config long cacheSize[string] = [
29 ["4-way cache (0k)", 0x00000],
30 ["4-way cache (32k)", 0x08000],
31 ["4-way cache (64k)", 0x10000],
32 ["4-way cache (128k)", 0x20000],
33 ["4-way cache (256k)", 0x40000],
34 ];
35
36 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
37 ['l2Mode',{desc:"L2 Cache",
38 map : [["4-way cache (0k)",0x0000],
39 ["4-way cache (32k)",0x8000],
40 ["4-way cache (64k)",0x10000],
41 ["4-way cache (128k)",0x20000],
42 ["4-way cache (256k)",0x40000]],
43 defaultValue: "4-way cache (0k)",
44 memorySection: "IRAM"}]
45 ];
46
47 instance:
48 override config int minProgUnitSize = 1;
49 override config int minDataUnitSize = 1;
50 override config int dataWordSize = 4;
51
52 override config string cpuCore = "6400";
53 override config string isa="64";
54 override config string cpuCoreRevision = "1.0";
55
56 /*!
57 * ======== memMap ========
58 * The default memory map for this device
59 */
60 config xdc.platform.IPlatform.Memory memMap[string] = [
61 ["IRAM", {
62 name: "IRAM",
63 comment: "Internal L2 memory",
64 base: 0x00000,
65 len: 0x80000,
66 space: "code/data",
67 access: "RWX"
68 }],
69 ];
70 }
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