1    /*
     2     * Copyright (c) 2012-2014 Texas Instruments Incorporated - https://www.ti.com
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    /*
    34     *  ======== InterruptDsp.xdc ========
    35     */
    36    package ti.sdo.ipc.family.vayu;
    37    
    38    import ti.sdo.utils.MultiProc;
    39    import xdc.rov.ViewInfo;
    40    
    41    /*!
    42     *  ======== InterruptDsp ========
    43     *  Vayu/DSP interrupt manager
    44     */
    45    module InterruptDsp inherits ti.sdo.ipc.notifyDrivers.IInterrupt
    46    {
    47        /*! @_nodoc */
    48        metaonly struct InterruptDataView {
    49            String      remoteProcName;
    50            Bool        registered;
    51            Bool        enabled;
    52            Bool        intPending;
    53            Ptr         payload;
    54        };
    55    
    56        /*! @_nodoc */
    57    //  @Facet
    58    //  metaonly config xdc.rov.ViewInfo.Instance rovViewInfo =
    59    //      xdc.rov.ViewInfo.create({
    60    //          viewMap: [
    61    //              ['IncomingInterrupts',
    62    //                  {
    63    //                      type: xdc.rov.ViewInfo.MODULE_DATA,
    64    //                      viewInitFxn: 'viewInitInterrupt',
    65    //                      structName: 'InterruptDataView'
    66    //                  }
    67    //              ],
    68    //          ]
    69    //      });
    70    
    71        /* Total number of cores on Vayu SoC */
    72        const UInt8 NUM_CORES = 11;
    73    
    74        /* Number of Cores in EVE Sub-system */
    75        const UInt8 NUM_EVES = 4;
    76    
    77        /* Number of Cores in DSP Sub-system */
    78        const UInt8 NUM_DSP_CORES = 2;
    79    
    80        /* Number of Internal EVE mailboxes */
    81        const UInt8 NUM_EVE_MBX = 12;
    82    
    83        /* Number of System Mailboxes */
    84        const UInt8 NUM_SYS_MBX = 4;
    85    
    86        /* Base address for the Mailbox subsystem */
    87        config UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX];
    88    
    89    internal:
    90    
    91        /*
    92         * Mailbox table for storing encoded Base Address, mailbox user Id,
    93         * and sub-mailbox index.
    94         */
    95        config UInt32 mailboxTable[NUM_CORES * NUM_CORES];
    96    
    97        config UInt32 procIdTable[NUM_CORES];
    98    
    99        /*! Statically retrieve procIds to avoid doing this at runtime */
   100        config UInt eve1ProcId     = MultiProc.INVALIDID;
   101        config UInt eve2ProcId     = MultiProc.INVALIDID;
   102        config UInt eve3ProcId     = MultiProc.INVALIDID;
   103        config UInt eve4ProcId     = MultiProc.INVALIDID;
   104        config UInt dsp1ProcId     = MultiProc.INVALIDID;
   105        config UInt dsp2ProcId     = MultiProc.INVALIDID;
   106        config UInt ipu1_0ProcId   = MultiProc.INVALIDID;
   107        config UInt ipu2_0ProcId   = MultiProc.INVALIDID;
   108        config UInt hostProcId     = MultiProc.INVALIDID;
   109        config UInt ipu1_1ProcId   = MultiProc.INVALIDID;
   110        config UInt ipu2_1ProcId   = MultiProc.INVALIDID;
   111    
   112        /*! Function table */
   113        struct FxnTable {
   114            Fxn    func;
   115            UArg   arg;
   116        }
   117    
   118        /*!
   119         *  ======== intShmStub ========
   120         *  Stub to be plugged
   121         */
   122        Void intShmStub(UInt16 idx);
   123    
   124        struct Module_State {
   125            /*
   126             * Create a function table of length (Total number of cores in the
   127             * System) for each DSP core.
   128             */
   129            FxnTable   fxnTable[NUM_CORES];
   130        };
   131    }