42 #ifndef _POWER_RSC_TABLE_VAYU_DSP_H_
43 #define _POWER_RSC_TABLE_VAYU_DSP_H_
45 #include <ti/ipc/remoteproc/rsc_types.h>
48 #define L4_DRA7XX_BASE 0x4A000000
50 #define L4_PERIPHERAL_L4CFG (L4_DRA7XX_BASE)
51 #define DSP_PERIPHERAL_L4CFG 0x4A000000
53 #define L4_PERIPHERAL_L4PER1 0x48000000
54 #define DSP_PERIPHERAL_L4PER1 0x48000000
56 #define L4_PERIPHERAL_L4PER2 0x48400000
57 #define DSP_PERIPHERAL_L4PER2 0x48400000
59 #define L4_PERIPHERAL_L4PER3 0x48800000
60 #define DSP_PERIPHERAL_L4PER3 0x48800000
62 #define L4_PERIPHERAL_L4EMU 0x54000000
63 #define DSP_PERIPHERAL_L4EMU 0x54000000
65 #define L3_PERIPHERAL_DMM 0x4E000000
66 #define DSP_PERIPHERAL_DMM 0x4E000000
68 #define L3_TILER_MODE_0_1 0x60000000
69 #define DSP_TILER_MODE_0_1 0x60000000
71 #define L3_TILER_MODE_2 0x70000000
72 #define DSP_TILER_MODE_2 0x70000000
74 #define L3_TILER_MODE_3 0x78000000
75 #define DSP_TILER_MODE_3 0x78000000
77 #define DSP_MEM_TEXT 0x95000000
79 #define DSP_MEM_IOBUFS 0x80000000
80 #define DSP_MEM_DATA 0x95100000
81 #define DSP_MEM_HEAP 0x95200000
82 #define DSP_INTMEM_L2 0x800000
84 #define PHYS_MEM_L2_RAM 0x40800000
86 #define PHYS_MEM_L2_RAM 0x41000000
88 #define DSP_MEM_L2_RAM_SIZE 0x00040000
90 #define DSP_MEM_IPC_DATA 0x9F000000
91 #define DSP_MEM_IPC_VRING 0xA0000000
92 #define DSP_MEM_RPMSG_VRING0 0xA0000000
93 #define DSP_MEM_RPMSG_VRING1 0xA0004000
94 #define DSP_MEM_VRING_BUFS0 0xA0040000
95 #define DSP_MEM_VRING_BUFS1 0xA0080000
97 #define DSP_MEM_IPC_VRING_SIZE SZ_1M
98 #define DSP_MEM_IPC_DATA_SIZE SZ_1M
99 #define DSP_MEM_TEXT_SIZE SZ_1M
100 #define DSP_MEM_DATA_SIZE SZ_1M
101 #define DSP_MEM_HEAP_SIZE (SZ_1M * 3)
102 #define DSP_MEM_IOBUFS_SIZE (SZ_1M * 90)
109 #define PHYS_MEM_IPC_VRING 0x99000000
110 #elif defined (DSP_2)
111 #define PHYS_MEM_IPC_VRING 0x9F000000
115 #define PHYS_MEM_IOBUFS 0xBA300000
121 #define DSP_RPMSG_VQ0_SIZE 256
122 #define DSP_RPMSG_VQ1_SIZE 256
125 #define RPMSG_DSP_C0_FEATURES 1
128 struct resource_table base;
133 struct fw_rsc_vdev rpmsg_vdev;
134 struct fw_rsc_vdev_vring rpmsg_vring0;
135 struct fw_rsc_vdev_vring rpmsg_vring1;
138 struct fw_rsc_carveout text_cout;
141 struct fw_rsc_carveout data_cout;
144 struct fw_rsc_carveout heap_cout;
147 struct fw_rsc_carveout ipcdata_cout;
150 struct fw_rsc_trace trace;
153 struct fw_rsc_devmem devmem0;
156 struct fw_rsc_devmem devmem1;
159 struct fw_rsc_devmem devmem2;
162 struct fw_rsc_devmem devmem3;
165 struct fw_rsc_devmem devmem4;
168 struct fw_rsc_devmem devmem5;
171 struct fw_rsc_devmem devmem6;
174 struct fw_rsc_devmem devmem7;
177 struct fw_rsc_devmem devmem8;
180 struct fw_rsc_devmem devmem9;
183 struct fw_rsc_devmem devmem10;
190 #define TRACEBUFADDR (UInt32)&ti_trace_SysMin_Module_State_0_outbuf__A
192 #pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table")
193 #pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096)
223 TYPE_VDEV, VIRTIO_ID_RPMSG, 0,
274 SZ_256M, 0, 0,
"DSP_TILER_MODE_0_1",
280 SZ_128M, 0, 0,
"DSP_TILER_MODE_2",
286 SZ_128M, 0, 0,
"DSP_TILER_MODE_3",
292 SZ_16M, 0, 0,
"DSP_PERIPHERAL_L4CFG",
298 SZ_2M, 0, 0,
"DSP_PERIPHERAL_L4PER1",
304 SZ_4M, 0, 0,
"DSP_PERIPHERAL_L4PER2",
310 SZ_8M, 0, 0,
"DSP_PERIPHERAL_L4PER3",
316 SZ_16M, 0, 0,
"DSP_PERIPHERAL_L4EMU",
322 SZ_1M, 0, 0,
"DSP_PERIPHERAL_DMM",
#define PHYS_MEM_IOBUFS
Definition: power_rsc_table_vayu_dsp.h:115
#define DSP_TILER_MODE_0_1
Definition: power_rsc_table_vayu_dsp.h:69
struct fw_rsc_carveout data_cout
Definition: gatempapp_rsc_table_vayu_dsp.h:138
Definition: gatempapp_rsc_table_vayu_dsp.h:124
struct my_resource_table ti_ipc_remoteproc_ResourceTable
Definition: power_rsc_table_vayu_dsp.h:195
struct fw_rsc_carveout ipcdata_cout
Definition: gatempapp_rsc_table_vayu_dsp.h:144
#define DSP_MEM_IPC_DATA_SIZE
Definition: power_rsc_table_vayu_dsp.h:98
#define DSP_MEM_IOBUFS_SIZE
Definition: power_rsc_table_vayu_dsp.h:102
struct fw_rsc_carveout text_cout
Definition: gatempapp_rsc_table_vayu_dsp.h:135
#define L4_PERIPHERAL_L4PER1
Definition: power_rsc_table_vayu_dsp.h:53
#define DSP_PERIPHERAL_L4PER2
Definition: power_rsc_table_vayu_dsp.h:57
#define DSP_MEM_HEAP
Definition: power_rsc_table_vayu_dsp.h:81
#define DSP_MEM_IPC_VRING
Definition: power_rsc_table_vayu_dsp.h:91
#define L3_TILER_MODE_0_1
Definition: power_rsc_table_vayu_dsp.h:68
#define DSP_RPMSG_VQ1_SIZE
Definition: power_rsc_table_vayu_dsp.h:122
#define DSP_MEM_RPMSG_VRING1
Definition: power_rsc_table_vayu_dsp.h:93
#define DSP_MEM_RPMSG_VRING0
Definition: power_rsc_table_vayu_dsp.h:92
#define L3_TILER_MODE_3
Definition: power_rsc_table_vayu_dsp.h:74
#define L3_TILER_MODE_2
Definition: power_rsc_table_vayu_dsp.h:71
#define DSP_INTMEM_L2
Definition: power_rsc_table_vayu_dsp.h:82
struct fw_rsc_devmem devmem2
Definition: gatempapp_rsc_table_vayu_dsp.h:156
#define DSP_MEM_TEXT_SIZE
Definition: power_rsc_table_vayu_dsp.h:99
#define RPMSG_DSP_C0_FEATURES
Definition: power_rsc_table_vayu_dsp.h:125
struct fw_rsc_devmem devmem6
Definition: gatempapp_rsc_table_vayu_dsp.h:168
struct fw_rsc_intmem l2_intmem
Definition: power_rsc_table_vayu_dsp.h:186
#define DSP_MEM_DATA
Definition: power_rsc_table_vayu_dsp.h:80
#define DSP_PERIPHERAL_DMM
Definition: power_rsc_table_vayu_dsp.h:66
#define DSP_PERIPHERAL_L4CFG
Definition: power_rsc_table_vayu_dsp.h:51
#define DSP_MEM_IOBUFS
Definition: power_rsc_table_vayu_dsp.h:79
#define DSP_PERIPHERAL_L4PER3
Definition: power_rsc_table_vayu_dsp.h:60
#define L4_PERIPHERAL_L4CFG
Definition: power_rsc_table_vayu_dsp.h:50
#define DSP_MEM_TEXT
Definition: power_rsc_table_vayu_dsp.h:77
#define DSP_PERIPHERAL_L4PER1
Definition: power_rsc_table_vayu_dsp.h:54
struct fw_rsc_devmem devmem10
Definition: gatempapp_rsc_table_vayu_dsp.h:180
#define PHYS_MEM_IPC_VRING
Definition: gatempapp_rsc_table_vayu_dsp.h:109
#define DSP_MEM_IPC_VRING_SIZE
Definition: power_rsc_table_vayu_dsp.h:97
#define DSP_MEM_IPC_DATA
Definition: power_rsc_table_vayu_dsp.h:90
struct fw_rsc_carveout heap_cout
Definition: gatempapp_rsc_table_vayu_dsp.h:141
#define DSP_MEM_L2_RAM_SIZE
Definition: power_rsc_table_vayu_dsp.h:88
#define L4_PERIPHERAL_L4PER2
Definition: power_rsc_table_vayu_dsp.h:56
struct fw_rsc_devmem devmem0
Definition: gatempapp_rsc_table_vayu_dsp.h:150
#define L4_PERIPHERAL_L4EMU
Definition: power_rsc_table_vayu_dsp.h:62
struct fw_rsc_devmem devmem7
Definition: gatempapp_rsc_table_vayu_dsp.h:171
struct fw_rsc_devmem devmem5
Definition: gatempapp_rsc_table_vayu_dsp.h:165
char ti_trace_SysMin_Module_State_0_outbuf__A
#define DSP_RPMSG_VQ0_SIZE
Definition: power_rsc_table_vayu_dsp.h:121
struct fw_rsc_devmem devmem4
Definition: gatempapp_rsc_table_vayu_dsp.h:162
#define TRACEBUFADDR
Definition: power_rsc_table_vayu_dsp.h:190
struct fw_rsc_devmem devmem1
Definition: gatempapp_rsc_table_vayu_dsp.h:153
#define L3_PERIPHERAL_DMM
Definition: power_rsc_table_vayu_dsp.h:65
#define DSP_TILER_MODE_2
Definition: power_rsc_table_vayu_dsp.h:72
#define DSP_MEM_HEAP_SIZE
Definition: power_rsc_table_vayu_dsp.h:101
UInt32 offset[19]
Definition: gatempapp_rsc_table_vayu_dsp.h:127
struct fw_rsc_devmem devmem9
Definition: gatempapp_rsc_table_vayu_dsp.h:177
#define DSP_MEM_DATA_SIZE
Definition: power_rsc_table_vayu_dsp.h:100
struct fw_rsc_trace trace
Definition: gatempapp_rsc_table_vayu_dsp.h:147
struct fw_rsc_devmem devmem3
Definition: gatempapp_rsc_table_vayu_dsp.h:159
#define DSP_TILER_MODE_3
Definition: power_rsc_table_vayu_dsp.h:75
struct fw_rsc_vdev rpmsg_vdev
Definition: gatempapp_rsc_table_vayu_dsp.h:130
#define L4_PERIPHERAL_L4PER3
Definition: power_rsc_table_vayu_dsp.h:59
struct fw_rsc_devmem devmem8
Definition: gatempapp_rsc_table_vayu_dsp.h:174
#define DSP_PERIPHERAL_L4EMU
Definition: power_rsc_table_vayu_dsp.h:63