1    /*
     2     *  Copyright 2013 by Texas Instruments Incorporated.
     3     *
     4     */
     5    
     6    /*
     7     * Copyright (c) 2012, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     *
    37     */
    38    
    39    /*
    40     * ======== Settings.xdc ========
    41     * Configuration for the EDMA3 module to be able to create handles to the
    42     * resource handles for various scratch groups.
    43     */
    44    
    45    
    46    @Template("./Settings.xdt")
    47    
    48    metaonly module Settings {
    49    
    50        /*!
    51         * ======== controllerId =======
    52         * Id of the EDMA3 instance that will be used to request resources from.
    53         * If this platform is natively supported by this module and the default
    54         * configurations are being used, this Id is used to determine, which EDMA3
    55         * instance to request resources from.
    56         */
    57        config UInt controllerId = 0;
    58    
    59        /*!
    60         * ======== region ========
    61         * Id of the EDMA3 Region we will program with the assigned Resources etc.
    62         * If this platform is natively supported by this module and the default
    63         * configurations are being used, region number is used to determine,
    64         * which region of the EDMA3 configuration to request resources from.
    65         * On most heterogenous devices:
    66         * Region number 1 usually corresponds to DSP.
    67         * Region number 0 usually corresponds to ARM.
    68         * On most multicore devices:
    69         * Region number n corresponds to Core number n.
    70         */
    71        config UInt region = 1;
    72    
    73        /*!
    74         * ======== globalConfig ========
    75         * If a platform is not natively supported by this module or if the default
    76         * number of EDMA3 hardware resources is to be overriden for some reason,
    77         * this configuration is required to set the SOC specific details of EDMA3
    78         * Set this parameter to the name of a structure of type
    79         * EDMA3_GblConfigParams (defined in edma3_config.h).
    80         * far EDMA3_GblConfigParams _globalConfig;
    81         *
    82         *  Note:- This is required to be supplied ONLY if application is built for      *  DSP target.
    83         */
    84        config String globalConfig = null;
    85    
    86        /*!
    87         * ======== regionConfig ========
    88         * If a platform is not natively supported by this module or if the default
    89         * number of resources available to a particular region are to be overriden,
    90         * region specific configuration can be specified directly via this
    91         * parameter.
    92         * Set this parameter to the name of a structure of type
    93         * EDMA3_InstanceInitConfg (defined in edma3_config.h).
    94         * far EDMA3_InstanceInitConfg _regionConfig;
    95         *
    96         *  Note:- This is required to be supplied ONLY if application is built for      *  DSP target.
    97         */
    98        config String regionConfig = null;
    99    
   100        /*!
   101         * ======= createRMObj =======
   102         * Boolean value indicating if EDMA3 LLD RM object needs to be created by
   103         * FC or if it is going to be supplied by the driver or app etc.
   104         * TRUE by default. Should be set to FALSE in cases where the LLD is being
   105         * used, or if the app is supplying the semaphore functions for RM creation.
   106         */
   107        config bool createRMObj = true;
   108    
   109        /*!
   110         * ======== contiguousPaRams ========
   111         * Boolean value indicating if PaRams assigned to scratch groups need to be
   112         * contiguous or not
   113         */
   114        config bool contiguousPaRams = true;
   115    
   116        const UInt EDMA3_MAXGROUPS = 20;  /*! Maximum number of groups for sharing
   117                                     EDMA3 resources. */
   118        const UInt EDMA3_MAXTCS = 8;
   119    
   120        /*!
   121         * ======== globalInit ========
   122         * This flag decides if EDMA3 global registers and PaRam entries will be
   123         * initialized by this module.
   124         * If building this app for a system where ARM-side (or other) drivers might     * perform EDMA3 intialization, set this to false so it doesn't overwrite
   125         * the ARM-side setup.
   126         *
   127         *  Note:- This is required to be supplied ONLY if application is built for
   128         *  DSP target.
   129         */
   130        config Bool globalInit = false;
   131    
   132    
   133        /*!
   134         * ======== maxTccs ========
   135         * Arrays containing the maximum number of TCCs that will be assigned to
   136         * groups for sharing.
   137         * Algorithms created within a given group ID will share the EDMA3 resources
   138         * assigned to that group
   139         *
   140         *  Note:- This is required to be supplied ONLY if application is built for
   141         *  DSP target.
   142         */
   143        config UInt maxTccs[EDMA3_MAXGROUPS];
   144    
   145        /*!
   146         * ======== maxPaRams ========
   147         * Arrays containing the maximum number of PaRams that will be assigned to
   148         * groups for sharing.
   149         * Algorithms created within a given group ID will share the EDMA3 resources
   150         * assigned to that group
   151         *
   152         *  Note:- This is required to be supplied ONLY if application is built for
   153         *  DSP target.
   154         */
   155        config UInt maxPaRams[EDMA3_MAXGROUPS];
   156    
   157        /*!
   158         * ======== maxEdmaChannels ========
   159         * Array containing the maximum number of Edma Channels that will be
   160         * assigned to groups for sharing.
   161         * Algorithms created within a given group ID will share the EDMA3 resources
   162         * assigned to that group
   163         * On devices where DCHMAP doesn't exist, it is recommended to request as
   164         * many channels as PaRams requested
   165         *
   166         *  Note:- This is required to be supplied ONLY if application is built for
   167         *  DSP target.
   168         */
   169        config UInt maxEdmaChannels[EDMA3_MAXGROUPS];
   170    
   171        /*!
   172         * ======== maxQdmaChannels ========
   173         * Array containing the maximum number of Qdma Channels that will be
   174         * assigned to groups for sharing.
   175         * Algorithms created within a given group ID will share the EDMA3 resources
   176         * assigned to that group
   177         *
   178         *  Note:- This is required to be supplied ONLY if application is built for
   179         *  DSP target.
   180         */
   181        config UInt maxQdmaChannels[EDMA3_MAXGROUPS];
   182    
   183        /*!
   184         *  ======== persistentAllocFxn ========
   185         *  Function for allocating persistent memory for RMAN's and other IRESMAN
   186         *  implementation's internal objects.
   187         *
   188         *  Note:- This is required to be supplied ONLY if
   189         *  {@link ti.sdo.fc.rman.RMAN#useDSKT2} is set to `false`.
   190         */
   191        config String persistentAllocFxn = null;
   192    
   193        /*!
   194         *  ======== persistentFreeFxn ========
   195         *  Function for freeing persistent memory used by RMAN and other IRESMAN
   196         *  implementation's internal objects.
   197         *
   198         *  Note:- This is required to be supplied ONLY if
   199         *  {@link ti.sdo.fc.rman.RMAN#useDSKT2} is set to `false`.
   200         */
   201        config String persistentFreeFxn = null;
   202    
   203        /*!
   204         *  ======== semCreateFxn ========
   205         * Function to create semaphores used by various individual resource
   206         * manager(s) registered with RMAN.
   207         *
   208         *  Function signature is:
   209         *  @p(code)
   210         * Void * _semCreate(Int key, Int count);
   211         */
   212        config String semCreateFxn = null;
   213    
   214        /*!
   215         *  ======== semDeleteFxn ========
   216         * Function to delete semaphores used by various individual resource
   217         * manager(s) registered with RMAN.
   218         *
   219         *  Function signature is:
   220         *  @p(code)
   221         *  Void _semDelete(Void * sem);
   222         */
   223        config String semDeleteFxn = null;
   224    
   225        /*!
   226         *  ======== semPendFxn ========
   227         * Function to pend on semaphores used by various resource manager(s)
   228         * registered with RMAN.
   229         *
   230         *  Function signature is:
   231         *  @p(code)
   232         *  Int _semPend(Void * sem, UInt32 timeout);
   233         */
   234        config String semPendFxn = null;
   235    
   236        /*!
   237         *  ======== semPostFxn ========
   238         * Function to post on Semaphores used by various resource manager(s)
   239         * registered with RMAN.
   240         *
   241         *  Function signature is:
   242         *  @p(code)
   243         * Void _semPost(Void * sem);
   244         */
   245        config String semPostFxn = null;
   246    
   247        /*!
   248         * ======== maxAlgs ========
   249         * Maximum number of algorithm instances that will be created
   250         */
   251        config UInt maxAlgs = 32;
   252    
   253        /*!
   254         * ========= maxRequests ======
   255         * Maximum number of "active" resource requests that will be
   256         * made by the algorithms in each scratch group
   257         */
   258        config UInt maxRequests = 64;
   259    
   260        /*!
   261         * ======= intMemoryQ =======
   262         * Configuration to setup Queue # to be used to internal memory writes,
   263         * Multiple Queues can be configured for same type of memory writes to allow
   264         * load balancing for performance.
   265         * This is required to be supplied ONLY if application is built for DSP
   266         * target .
   267         */
   268        config UInt intMemoryQ0;
   269        config UInt intMemoryQ1;
   270        config UInt intMemoryQ2;
   271    
   272        /*!
   273         * ======= extMemoryQ =======
   274         * Configuration to setup Queue # to be used to external memory writes
   275         * Multiple Queues can be configured for same type of memory writes to allow
   276         * load balancing for performance.
   277         * This is required to be supplied ONLY if application is built for DSP
   278         * target .
   279         */
   280        config UInt extMemoryQ0;
   281        config UInt extMemoryQ1;
   282        config UInt extMemoryQ2;
   283    
   284        /*
   285         * ======= otherQ =======
   286         * Configuration to setup Queue # for "Other", possibly peripheral, writes.
   287         * Multiple Queues can be configured for same type of memory writes to allow
   288         * load balancing for performance.
   289         * This is required to be supplied ONLY if application is built for DSP
   290         * target .
   291         */
   292        config UInt otherQ0;
   293        config UInt otherQ1;
   294    
   295        /*!
   296         * ======== eventQueueSetup ========
   297         * This flag decides if EDMA3 global registers related to Transfer
   298         * Controller/Queues should be programmed.
   299         * If using on a device where ARM-side drivers might perform the
   300         * intialization, set this to false so it doesn't overwrite the ARM-side
   301         * setup.
   302         * This is required to be supplied ONLY if application is built for
   303         * DSP target.
   304         */
   305        config Bool eventQueueSetup = false;
   306    
   307        /*!
   308         * ======= defaultQ =======
   309         * Default queue assignment for all channels allocated for this app. When
   310         * channels are first granted to the algorithm, they will be mapped to this
   311         * Event Queue.
   312         */
   313        config UInt defaultQ = 0;
   314    
   315        /*
   316         * ======= queueTCMap =======
   317         * Maps Event queues to TCs. Default mapping is from Queue #n to TC #n
   318         * If modifying this, please ensure that queue setup for different types
   319         * of writes has been adjusted accordingly.
   320         * By default Queue # N gets mapped to TC # N
   321         * If certain queue mappings are not to be overridden, set those entries in
   322         * array to -1.
   323         */
   324        config Int queueTCMap[EDMA3_MAXTCS];
   325    
   326        /*
   327         * ======= queuePriority =======
   328         * Assigns priority to different queues. This priority has an effect during
   329         * arbitration of transfers within the SCR.
   330         * For consistency, program the higher priority queues (lower #) with a
   331         * higher priority (lower #).
   332         * Note:- The higher priority queues (lower #) also get serviced first by
   333         * the transfer controller.
   334         * By default, Queue # N, has priority# N.
   335         * If certain queue priorities are not to be overridden, set entries in
   336         * array to -1.
   337         */
   338        config Int queuePriority[EDMA3_MAXTCS];
   339    
   340        /*!
   341         *  ======== ipcKeyBase ========
   342         *  Linux only. Base value of keys of Linux IPC objects used by
   343         *  EDMA3. The IPC objects created by EDMA3 will use keys starting
   344         *  at this
   345         *  value, and incrementing with each new object. There are currently
   346         *  three IPC objects, so keys in the range of ipcKeyBase to ipcKeyBase + 2
   347         *  will be reserved for EDMA3. The default value of ipcKeyBase is
   348         *  ascii code for "3AMD".
   349         *
   350         *  WARNING: This value should only be changed if it conflicts with
   351         *  another IPC key in the system that cannot be changed. If this value
   352         *  is changed, all programs using EDMA3 that will be run simultaneously
   353         *  must have the ipcKeyBase configured to the new value.
   354         *  @_nodoc
   355         */
   356        config UInt ipcKeyBase = 0x33414D44;
   357    }
   358    /*
   359     *  @(#) ti.sdo.fc.edma3; 3, 0, 0,3; 7-23-2013 14:09:53; /db/atree/library/trees/fc/fc-t12/src/ xlibrary
   360    
   361     */
   362