1    /* 
     2     * Copyright (c) 2010, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     * 
    32     */
    33    
    34    /*
    35     * ======== Settings.xdc ========
    36     * Configuration for the EDMA3 module to be able to create handles to the
    37     * resource handles for various scratch groups.
    38     */
    39    
    40    
    41    @Template("./Settings.xdt")
    42    
    43    metaonly module Settings {
    44    
    45        config UInt controllerId = 0; 
    46    
    47    
    48        /*!
    49         * ======== region ========
    50         * Id of the EDMA3 Region we will program with the assigned Resources etc.
    51         * Region number 1 usually corresponds to DSP.
    52         * Region number 0 usually corresponds to ARM. 
    53         */
    54        config UInt region = 1;
    55    
    56        /*!
    57         *  ======== persistentAllocFxn ========
    58         *  Function for allocating persistent memory for RMAN's and other IRESMAN
    59         *  implementation's internal objects.
    60         *
    61         *  This is required to be supplied ONLY if
    62         *  {@link ti.sdo.fc.rman.RMAN#useDSKT2} is set to `false`.
    63         */
    64        config String persistentAllocFxn = null;
    65     
    66        /*!
    67         *  ======== persistentFreeFxn ========
    68         *  Function for freeing persistent memory used by RMAN and other IRESMAN
    69         *  implementation's internal objects.
    70         *
    71         *  This is required to be supplied ONLY if
    72         *  {@link ti.sdo.fc.rman.RMAN#useDSKT2} is set to `false`.
    73         */
    74        config String persistentFreeFxn = null;
    75     
    76        /*!
    77         *  ======== semCreateFxn ========
    78         * Function to create semaphores used by various individual resource
    79         * manager(s) registered with RMAN.
    80         *
    81         *  Function signature is:
    82         *  @p(code)
    83         * Void * _semCreate(Int key, Int count);
    84         */
    85        config String semCreateFxn = null;
    86     
    87        /*!
    88         *  ======== semDeleteFxn ========
    89         * Function to delete semaphores used by various individual resource
    90         * manager(s) registered with RMAN.
    91         *
    92         *  Function signature is:
    93         *  @p(code)
    94         *  Void _semDelete(Void * sem);
    95         */
    96        config String semDeleteFxn = null;
    97      
    98        /*!
    99         *  ======== semPendFxn ========
   100         * Function to pend on semaphores used by various resource manager(s)
   101         * registered with RMAN.
   102         *
   103         *  Function signature is:
   104         *  @p(code)
   105         *  Int _semPend(Void * sem, UInt32 timeout);
   106         */
   107        config String semPendFxn = null;
   108     
   109        /*!
   110         *  ======== semPostFxn ========
   111         * Function to post on Semaphores used by various resource manager(s)
   112         * registered with RMAN.
   113         *
   114         *  Function signature is:
   115         *  @p(code)
   116         * Void _semPost(Void * sem);
   117         */
   118        config String semPostFxn = null;
   119    
   120        /*!
   121         * ======== maxAlgs ========
   122         * Maximum number of algorithm instances that will be created  
   123         */
   124        config UInt maxAlgs = 32;
   125    
   126        /*!
   127         * ========= maxRequests ======
   128         * Maximum number of "active" resource requests that will be 
   129         * made by the algorithms in each scratch group
   130         */  
   131        config UInt maxRequests = 64;
   132    
   133        /*!
   134         * ======== contiguousPaRams ========
   135         * Boolean value indicating if PaRams assigned to scratch groups need to be
   136         * contiguous or not
   137         */
   138        config bool contiguousPaRams = true;
   139    
   140        const UInt EDMA3_MAXGROUPS = 20;  /*! Maximum number of groups for sharing
   141                                     EDMA3 resources. */
   142        const UInt EDMA3_MAXTCS = 8;
   143    
   144        /*!
   145         * ======== globalInit ========
   146         * This flag decides if EDMA3 global registers and PaRam entries will be 
   147         * initialized by this module. 
   148         * If using on a device where ARM-side drivers might perform the 
   149         * intialization, set this to false so it doesn't overwrite the ARM-side
   150         * setup.
   151         *  This is required to be supplied ONLY if
   152         *  Application is built for DSP target .
   153         */
   154        config Bool globalInit = false;
   155    
   156        /*!
   157         * ======== globalConfig ========
   158         * Global configuration required to set the SOC specific configuration of
   159         * of the EDMA3 device
   160         *  This is required to be supplied ONLY if
   161         *  Application is built for DSP target .
   162         * far EDMA3_GblConfigParams _globalConfig;
   163         */
   164        config String globalConfig = null;
   165    
   166        /*!
   167         * ======== regionConfig ========
   168         * Instance specific  configuration required to set the region specific
   169         * resource ownership details of the EDMA3 device
   170         *  This is required to be supplied ONLY if
   171         *  Application is built for DSP target .
   172         * far EDMA3_InstanceInitConfg _regionConfig;
   173         */
   174        config String regionConfig = null;
   175    
   176     
   177        /*!
   178         * ======== maxTccs ========
   179         * Arrays containing the maximum number of TCCs that will be assigned to
   180         * groups for sharing.
   181         * Algorithms created within a given group ID will share the EDMA3 resources
   182         * assigned to that group
   183         *  This is required to be supplied ONLY if
   184         *  Application is built for DSP target .
   185         */
   186        config UInt maxTccs[EDMA3_MAXGROUPS];
   187    
   188        /*!
   189         * ======== maxPaRams ========
   190         * Arrays containing the maximum number of PaRams that will be assigned to
   191         * groups for sharing.
   192         * Algorithms created within a given group ID will share the EDMA3 resources
   193         * assigned to that group
   194         * This is required to be supplied ONLY if application is built for DSP 
   195         * target.
   196         */
   197        config UInt maxPaRams[EDMA3_MAXGROUPS];
   198    
   199        /*!
   200         * ======== maxEdmaChannels ========
   201         * Array containing the maximum number of Edma Channels that will be
   202         * assigned to groups for sharing.
   203         * Algorithms created within a given group ID will share the EDMA3 resources
   204         * assigned to that group
   205         * On devices where DCHMAP doesn't exist, it is recommended to request as
   206         * many channels as PaRams requested
   207         * This is required to be supplied ONLY if application is built for DSP 
   208         * target .
   209         */
   210        config UInt maxEdmaChannels[EDMA3_MAXGROUPS];
   211    
   212        /*!
   213         * ======== maxQdmaChannels ========
   214         * Array containing the maximum number of Qdma Channels that will be
   215         * assigned to groups for sharing.
   216         * Algorithms created within a given group ID will share the EDMA3 resources
   217         * assigned to that group
   218         * This is required to be supplied ONLY if application is built for DSP 
   219         * target .
   220         */
   221        config UInt maxQdmaChannels[EDMA3_MAXGROUPS];
   222    
   223        /*!
   224         *  ======== ipcKeyBase ========
   225         *  Linux only. Base value of keys of Linux IPC objects used by
   226         *  EDMA3. The IPC objects created by EDMA3 will use keys starting
   227         *  at this
   228         *  value, and incrementing with each new object. There are currently
   229         *  three IPC objects, so keys in the range of ipcKeyBase to ipcKeyBase + 2
   230         *  will be reserved for EDMA3. The default value of ipcKeyBase is
   231         *  ascii code for "3AMD".
   232         *
   233         *  WARNING: This value should only be changed if it conflicts with
   234         *  another IPC key in the system that cannot be changed. If this value
   235         *  is changed, all programs using EDMA3 that will be run simultaneously
   236         *  must have the ipcKeyBase configured to the new value.
   237         *  @_nodoc
   238         */
   239        config UInt ipcKeyBase = 0x33414D44;
   240    
   241    
   242        /*!
   243         * ======= intMemoryQ =======
   244         * Configuration to setup Queue # to be used to internal memory writes, 
   245         * Multiple Queues can be configured for same type of memory writes to allow
   246         * load balancing for performance.
   247         * This is required to be supplied ONLY if application is built for DSP 
   248         * target .
   249         */
   250        config UInt intMemoryQ0; 
   251        config UInt intMemoryQ1; 
   252        config UInt intMemoryQ2; 
   253    
   254        /*!
   255         * ======= extMemoryQ =======
   256         * Configuration to setup Queue # to be used to external memory writes
   257         * Multiple Queues can be configured for same type of memory writes to allow
   258         * load balancing for performance.
   259         * This is required to be supplied ONLY if application is built for DSP 
   260         * target .
   261         */
   262        config UInt extMemoryQ0; 
   263        config UInt extMemoryQ1; 
   264        config UInt extMemoryQ2; 
   265    
   266        /*
   267         * ======= otherQ ======= 
   268         * Configuration to setup Queue # for "Other", possibly peripheral, writes. 
   269         * Multiple Queues can be configured for same type of memory writes to allow
   270         * load balancing for performance.
   271         * This is required to be supplied ONLY if application is built for DSP 
   272         * target .
   273         */
   274        config UInt otherQ0; 
   275        config UInt otherQ1; 
   276    
   277        /*!
   278         * ======== eventQueueSetup ========
   279         * This flag decides if EDMA3 global registers related to Transfer 
   280         * Controller/Queues should be programmed.  
   281         * If using on a device where ARM-side drivers might perform the 
   282         * intialization, set this to false so it doesn't overwrite the ARM-side
   283         * setup.
   284         * This is required to be supplied ONLY if application is built for 
   285         * DSP target.
   286         */
   287        config Bool eventQueueSetup = false;
   288    
   289        /*
   290         * ======= queueTCMap =======
   291         * Maps Event queues to TCs. Default mapping is from Queue #n to TC #n 
   292         * If modifying this, please ensure that queue setup for different types 
   293         * of writes has been adjusted accordingly.
   294         * By default Queue # N gets mapped to TC # N 
   295         * If certain queue mappings are not to be overridden, set those entries in
   296         * array to -1.    
   297         */
   298        config Int queueTCMap[EDMA3_MAXTCS];
   299    
   300        /*
   301         * ======= queuePriority =======
   302         * Assigns priority to different queues. This priority has an effect during
   303         * arbitration of transfers within the SCR. 
   304         * For consistency, program the higher priority queues (lower #) with a 
   305         * higher priority (lower #).  
   306         * Note:- The higher priority queues (lower #) also get serviced first by 
   307         * the transfer controller. 
   308         * By default, Queue # N, has priority# N.
   309         * If certain queue priorities are not to be overridden, set entries in
   310         * array to -1.    
   311         */
   312        config Int queuePriority[EDMA3_MAXTCS];
   313    }
   314    /*
   315     *  @(#) ti.sdo.fc.edma3; 3, 0, 0,234; 11-2-2010 18:25:33; /db/atree/library/trees/fc/fc-n22x/src/ xlibrary
   316    
   317     */
   318