Benchmark | Cycles |
Interrupt latency | 97 |
HWI_enable | 12 |
HWI_disable | 14 |
HWI_dispatch: Interrupt prolog for calling C function | 80 |
HWI_dispatch: Interrupt epilog following C function call | 70 |
SEM_ipost: Hardware interrupt to blocked task | 581 |
SWI_post: Hardware interrupt to software interrupt | 201 |
SWI_enable | 62 |
SWI_disable | 21 |
SWI_post: Post software interrupt again | 28 |
SWI_post: Post software interrupt, no context switch | 57 |
SWI_post: Post software interrupt, context switch | 122 |
TSK_enable | 86 |
TSK_disable | 45 |
TSK_create: Create a task, no context switch | 666 |
TSK_create: Create a task, context switch | 765 |
TSK_delete | 426 |
TSK_setpri: Set a task priority, no context switch | 282 |
TSK_setpri: Lower the current task own priority, context switch | 372 |
TSK_setpri: Raise a ready task priority, context switch | 372 |
TSK_yield | 228 |
SEM_post: Post a semaphore, no waiting task | 28 |
SEM_post: Post a semaphore, no context switch | 181 |
SEM_post: Post a semaphore, context switch | 257 |
SEM_pend: Pend on a semphore, no context switch | 19 |
SEM_pend: Pend on a semphore, context switch | 236 |
MBX_post: Post a mailbox, no tasks waiting | 112 |
MBX_post: Post a mailbox, no context switch | 265 |
MBX_post: Post a mailbox, context switch | 417 |
MBX_pend: Pend on a mailbox, no context switch | 112 |
MBX_pend: Pend on a mailbox, context switch | 246 |
LCK_post: Post a lock, no ownership relinquishment | 21 |
LCK_post: Post a lock, no context switch | 42 |
LCK_post: Post a lock, context switch | 285 |
LCK_pend: Pend on a self-owned lock | 30 |
LCK_pend: Pend on a lock, no context switch | 50 |
LCK_pend: Pend on a lock, context switch | 252 |
CLK_gethtime | 13 |
CLK_getltime | 19 |
LOG_event | 21 |
LOG_printf | 29 |
STS_add | 16 |
STS_delta | 19 |
STS_set | 13 |
MEM_alloc: Memory allocated on first block | 202 |
MEM_alloc: Memory allocated on second block | 214 |
MEM_alloc: Memory allocated on third block | 226 |
MEM_alloc: Memory allocated on fourth block | 238 |
MEM_free: Memory coalesces no block | 220 |
MEM_free: Memory coalesces one block | 240 |
MEM_free: Memory coalesces two blocks | 240 |
PIP_alloc | 97 |
PIP_free | 95 |
PIP_get | 97 |
PIP_put | 97 |
PIP_peek | 22 |
QUE_dequeue | 14 |
QUE_empty | 10 |
QUE_enqueue | 11 |
QUE_get | 19 |
QUE_insert | 10 |
QUE_put | 15 |
QUE_remove | 15 |
MSGQ_alloc | 111 |
MSGQ_put | 53 |
MSGQ_get with messages | 56 |
MSGQ_get with no messages | 74 |
MSGQ_free | 57 |
Note: Interrupt latency for DM644x rev 1.x is 126 cpu clock cycles. This is
due to the workaround for IDMA0 problem.