1 /* 2 * Copyright (c) 2012, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * */ 32 /* 33 * ======== InterruptDsp.xdc ======== 34 */ 35 36 import ti.sdo.utils.MultiProc; 37 38 /*! 39 * ======== InterruptDsp ======== 40 * Vayu/DSP interrupt manager 41 */ 42 43 module InterruptDsp inherits ti.sdo.ipc.notifyDrivers.IInterrupt 44 { 45 /*! @_nodoc */ 46 metaonly struct InterruptDataView { 47 String remoteProcName; 48 Bool registered; 49 Bool enabled; 50 Bool intPending; 51 Ptr payload; 52 }; 53 54 /*! @_nodoc */ 55 @Facet 56 metaonly config xdc.rov.ViewInfo.Instance rovViewInfo = 57 xdc.rov.ViewInfo.create({ 58 viewMap: [ 59 ['IncomingInterrupts', 60 { 61 type: xdc.rov.ViewInfo.MODULE_DATA, 62 viewInitFxn: 'viewInitInterrupt', 63 structName: 'InterruptDataView' 64 } 65 ], 66 ] 67 }); 68 69 /* Base address for the Mailbox subsystem */ 70 config UInt32 mailboxBaseAddr[10]; 71 72 /* TODO: Document how this table is generated */ 73 config UInt32 mailboxTable[64]; 74 75 config UInt32 dspInterruptTable[8]; 76 77 config UInt32 procIdTable[8]; 78 79 internal: 80 81 config UInt eve0ProcId = MultiProc.INVALIDID; 82 config UInt eve1ProcId = MultiProc.INVALIDID; 83 config UInt eve2ProcId = MultiProc.INVALIDID; 84 config UInt eve3ProcId = MultiProc.INVALIDID; 85 config UInt dsp0ProcId = MultiProc.INVALIDID; 86 config UInt dsp1ProcId = MultiProc.INVALIDID; 87 config UInt videoProcId = MultiProc.INVALIDID; 88 config UInt vpssProcId = MultiProc.INVALIDID; 89 90 /*! Function table */ 91 struct FxnTable { 92 Fxn func; 93 UArg arg; 94 } 95 96 /*! 97 * ======== intShmStub ======== 98 * Stub to be plugged 99 */ 100 Void intShmStub(UArg arg); 101 102 struct Module_State { 103 /* 104 * Create a function table of length 8 (Total number of cores in the 105 * System) for each DSP core. 106 */ 107 FxnTable fxnTable[8]; 108 UInt numPlugged[2]; /* # of times the interrupt was registered */ 109 }; 110 } 111 /* 112 * @(#) ti.sdo.ipc.family.vayu; 1, 0, 0, 0,1; 5-22-2012 16:20:39; /db/vtree/library/trees/ipc/ipc-h32/src/ xlibrary 113 114 */ 115