TI Cortex-R5F Thumb2 with hard FP Timing Benchmarks

Target Platform: ti.platforms.cortexR:AM65X

Tool Chain Version: 18.12.2

BIOS Version: bios_6_76_01_09_eng_k3

XDCTools Version: xdctools_3_55_01_20_core_eng

Benchmark	Cycles
Interrupt Latency	205
Hwi_restore()	5
Hwi_disable()	2
Hwi dispatcher prolog	204
Hwi dispatcher epilog	175
Hwi dispatcher	363
Hardware Interrupt to Blocked Task	528
Hardware Interrupt to Software Interrupt	353
Swi_enable()	46
Swi_disable()	9
Post Software Interrupt Again	17
Post Software Interrupt without Context Switch	65
Post Software Interrupt with Context Switch	156
Create a New Task without Context Switch	1685
Set a Task Priority without a Context Switch	104
Task_yield()	186
Post Semaphore No Waiting Task	53
Post Semaphore No Task Switch	122
Post Semaphore with Task Switch	212
Pend on Semaphore No Context Switch	44
Pend on Semaphore with Task Switch	210
Clock_getTicks()	9
POSIX Create a New Task without Context Switch	3214
POSIX Set a Task Priority without a Context Switch	70
POSIX Post Semaphore No Waiting Task	58
POSIX Post Semaphore No Task Switch	136
POSIX Post Semaphore with Task Switch	224
POSIX Pend on Semaphore No Context Switch	49
POSIX Pend on Semaphore with Task Switch	214

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.