1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
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    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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    31     */
    32    /*
    33     *  ======== TaskSupport.xdc ========
    34     *
    35     */
    36    
    37    package ti.sysbios.family.c7x;
    38    
    39    import xdc.runtime.Assert;
    40    
    41    /*!
    42     *  ======== TaskSupport ========
    43     *  C71 Task Support Module.
    44     */
    45    module TaskSupport inherits ti.sysbios.interfaces.ITaskSupport
    46    {
    47        /*!
    48         *  Default Task stack size.
    49         *
    50         *  The C7x CPU uses 2 stacks during interrupt processing.  The CPU
    51         *  automatically saves some context to the memory block to which the
    52         *  TCSP register points, and SW will save some context to the Task's
    53         *  SW stack during interrupt processing.  In order to keep specification
    54         *  and processing compatible across different CPU targets, SYS/BIOS
    55         *  uses a single stack memory block for both of these stacks (although
    56         *  there isn't really any stacking with TCSP since there is a distinct
    57         *  block for each Task which is used only once).  Due to HW alignment
    58         *  and size requirements for the TCSP block, there is a strict minimum
    59         *  of 16KB for the Task stack.
    60         */
    61        override readonly config SizeT defaultStackSize = 0x4000;
    62    
    63        /*!
    64         *  Required stack alignment (in MAUs).
    65         *
    66         *  The C7x CPU TCSP register requires this alignment (see
    67         *  {@link #defaultStackSize} for further information).
    68         */
    69        override readonly config UInt stackAlignment = 0x2000;
    70    
    71        /*! Asserted in TaskSupport_start */
    72        config Assert.Id A_stackSizeTooSmall = {
    73            msg: "A_stackSizeTooSmall: Task stack size must be >= 16KB."
    74        };
    75    }