This module manages the Memory Protect Unit (MPU) present in ARMv8
Cortex-M devices. It enables the application to partition the memory
into different regions and set protection attributes for each region.
The number of memory regions supported is device specific and may vary
on different devices.
Programming a memory region requires specifying the base address and
ending address of the region, and the region's protection attributes.
The protection attributes for each region include attributes such as
memory type (device or normal), shareability, cacheability and
read-write access permission.
The two memory types supported by the hardware are "Normal" (cacheable or
non-cacheable) and "Device" memory (gathering, reordering and/or early
acknowledgement). "Device" memory type is recommended for mapping
peripheral address space like memory-mapped registers. This type ensures
that the memory accesses to the peripheral memory are not performed
speculatively, are not repeated, and are always performed in order. The
"Normal" memory type is recommended for mapping memory regions storing
application code and data. The memory type is encoded in a Memory Attribute
Indirection Register (MAIR) and an index to it (see
attrIndx) is passed to
MPU_setRegion() function.
SYS/BIOS has 8 MAIR config params (MAIR0, MAIR2, ...) that are
initialized to default value. In order to have a custom memory
attribute, a user can either change the MAIRn config param in
the application's cfg script or call the
MPU_setMAIR()
runtime API.
For more details on MAIR encodings please refer v8M ARM Architecture
Reference Manual.
If changing the shareability attribute of a cacheable memory region,
it is possible for coherency problems to arise. In order to avoid possible
coherency errors, the below sequence should be followed to change the
shareability attributes of the memory region:
- Make the memory region Non-cacheable and outer-shareable
- Clean and invalidate the memory region from the cache
- Change the shareability attribute to the desired value
Example showing how to set attributes for a given memory region using
*.cfg script:
var MPU = xdc.useModule('ti.sysbios.family.arm.v8.MPU');
MPU.enableMPU = true;
// Mark memory region as normal outer and inner write-back
// cacheable
var attrs = new MPU.RegionAttrs();
MPU.initRegionAttrsMeta(attrs);
attrs.enable = true;
attrs.shareable = MPU.Shareable_NONE;
attrs.executable = false;
attrs.accessPerm = MPU.AccessPerm_RW_ANY;
attrs.attrIndx = 7; // Use MAIR 7 which has a default of outer and inner
// write-back cacheable
// Set attributes for memory region of size 32KB starting at
// address 0x20000000 using MPU region Id 0 to store the attributes.
MPU.setRegionMeta(0, 0x20000000, 32768, attrs);
enum MPU_AccessPerm |
|
Access Permissions
typedef enum MPU_AccessPerm {
MPU_AccessPerm_RW_PRIV,
// Read/write by privileged code only
MPU_AccessPerm_RW_ANY,
// Read/write by any privilege level
MPU_AccessPerm_RO_PRIV,
// Read only by privileged code only
MPU_AccessPerm_RO_ANY
// Read only by any privilege level
} MPU_AccessPerm;
enum MPU_Shareable |
|
Shareability attribute
typedef enum MPU_Shareable {
MPU_Shareable_NONE,
MPU_Shareable_OUTER,
MPU_Shareable_INNER
} MPU_Shareable;
struct MPU_DeviceRegs |
|
Memory Protection Unit (MPU) registers. Symbol "MPU_deviceRegs" is
a physical device
typedef struct MPU_DeviceRegs {
UInt32 TYPE;
// 0xD90 Type Register
UInt32 CTRL;
// 0xD94 Control Register
UInt32 RNR;
// 0xD98 Region Register
UInt32 RBAR;
// 0xD9C Region Base Address Register
UInt32 RLAR;
// 0xDA0 Region Base Limit Register
UInt32 RBAR_A1;
// 0xDA4 MPU RBAR Alias 1
UInt32 RLAR_A1;
// 0xDA8 MPU RLAR Alias 1
UInt32 RBAR_A2;
// 0xDAC MPU RBAR Alias 2
UInt32 RLAR_A2;
// 0xDB0 MPU RLAR Alias 2
UInt32 RBAR_A3;
// 0xDB4 MPU RBAR Alias 3
UInt32 RLAR_A3;
// 0xDB8 MPU RLAR Alias 3
UInt32 res0;
// 0xDBC Reserved
UInt32 MAIR0;
// 0xDC0 MAIR0
UInt32 MAIR1;
// 0xDC4 MAIR1
} MPU_DeviceRegs;
struct MPU_RegionAttrs |
|
Structure for setting protection attributes of a MPU region
typedef struct MPU_RegionAttrs {
Bool enable;
// Is MPU region enabled
// Memory region shareability
Bool executable;
// Is memory region executable
// Access permission
UInt8 attrIndx;
// Memory attributes index field 0-7
} MPU_RegionAttrs;
config MPU_A_invalidRegionId // module-wide |
|
Assert raised when an invalid region number is passed to MPU_setRegion()
extern const Assert_Id MPU_A_invalidRegionId;
config MPU_A_nullPointer // module-wide |
|
Assert raised when a pointer is null
config MPU_A_unalignedBaseAddr // module-wide |
|
Assert raised when region's base address is not aligned
extern const Assert_Id MPU_A_unalignedBaseAddr;
config MPU_A_unalignedEndAddr // module-wide |
|
Assert raised when region's end address is not aligned
extern const Assert_Id MPU_A_unalignedEndAddr;
config MPU_MAIR0 // module-wide |
|
Memory attribute 0
extern const UInt8 MPU_MAIR0;
DETAILS
Default is memory with non-gathering, non-reordering and no early write
acknowledegement property.
config MPU_MAIR1 // module-wide |
|
Memory attribute 1
extern const UInt8 MPU_MAIR1;
DETAILS
Default is memory with non-gathering, non-reordering and early write
acknowledegement property.
config MPU_MAIR2 // module-wide |
|
Memory attribute 2
extern const UInt8 MPU_MAIR2;
DETAILS
Default is memory with non-gathering, reordering and early write
acknowledegement property.
config MPU_MAIR3 // module-wide |
|
Memory attribute 3
extern const UInt8 MPU_MAIR3;
DETAILS
Default is memory with gathering, reordering and early write
acknowledegement property.
config MPU_MAIR4 // module-wide |
|
Memory attribute 4
extern const UInt8 MPU_MAIR4;
DETAILS
Default is normal outer & inner non-cacheable memory.
config MPU_MAIR5 // module-wide |
|
Memory attribute 5
extern const UInt8 MPU_MAIR5;
DETAILS
Default is normal outer non-cacheable, inner write-back cacheable
non-transient memory.
config MPU_MAIR6 // module-wide |
|
Memory attribute 6
extern const UInt8 MPU_MAIR6;
DETAILS
Default is normal outer & inner write-through cacheable non-transient
memory.
config MPU_MAIR7 // module-wide |
|
Memory attribute 7
extern const UInt8 MPU_MAIR7;
DETAILS
Default is normal outer and inner write-back cacheable non-transient
memory.
config MPU_defaultAttrs // module-wide |
|
Default region attributes structure
DETAILS
The default attributes structure marks the memory region as outer and
inner non-cacheable and non-shareable, with read-write access from
privileged code only.
config MPU_enableBackgroundRegion // module-wide |
|
Configuration parameter to enable background region
extern const Bool MPU_enableBackgroundRegion;
DETAILS
If the MPU is enabled and background region is also enabled, any
privileged access that does not map to any MPU memory region is
handled using the default memory map.
- See the "Protected Memory System Architecture (PMSA)" chapter
in the ARM v8M Architecture Reference Manual for more info on
the default memory map.
config MPU_enableMPU // module-wide |
|
Configuration parameter to enable MPU. Disabled by default
extern const Bool MPU_enableMPU;
extern MPU_deviceRegs |
|
MPU_DeviceRegs MPU_deviceRegs; // linked as extern ti_sysbios_family_arm_v8_MPU_deviceRegs
MPU_disable() // module-wide |
|
Disables the MPU
DETAILS
If the MPU is already disabled, then simply return.
MPU_enable() // module-wide |
|
Enables the MPU
DETAILS
If the MPU is already enabled, then simply return.
MPU_initRegionAttrs() // module-wide |
|
Initializes the region attribute structure
ARGUMENTS
attrs
Pointer to region attribute struct
MPU_isEnabled() // module-wide |
|
Determines if the MPU is enabled
MPU_setMAIR() // module-wide |
|
Sets the memory attribute encoding in the MAIRn register
Void MPU_setMAIR(UInt8 attrIndx, UInt8 attr);
ARGUMENTS
attrIndx
Memory attribute index
attr
Memory attribute encoding
DETAILS
MAIR provides the memory attribute encodings to the possible
attrIndx values in a MPU region entry.
attrIndx[2:0] selects the ATTRn bit-field in
the MAIR register.
Memory Attribute Indirection Register (MAIR) bit assignments:
|31 | 24|23 | 16|15 | 8|7 | 0|
--------------------------------------------------------------
MAIR0 | ATTR3 | ATTR2 | ATTR1 | ATTR0 |
--------------------------------------------------------------
MAIR1 | ATTR7 | ATTR6 | ATTR5 | ATTR4 |
--------------------------------------------------------------
SYS/BIOS has 8 MAIR config params (MAIR0, MAIR2, ...) that are
initialized to default value. In order to have a custom memory
attribute, a user can either change the MAIRn config param in
the application's cfg script or call this runtime API.
For more details on MAIR encodings please refer v8M ARM Architecture
Reference Manual.
MPU_setRegion() // module-wide |
|
Sets the MPU region attributes
Void MPU_setRegion(
UInt8 regionId,
Ptr regionBaseAddr,
Ptr regionEndAddr,
MPU_RegionAttrs *
attrs);
ARGUMENTS
regionId
MPU region number
regionBaseAddr
MPU region base address
regionEndAddr
MPU region end address
attrs
Protection attributes
SEE
Module-Wide Built-Ins |
|
// Get this module's unique id
Bool MPU_Module_startupDone();
// Test if this module has completed startup
// The heap from which this module allocates memory
Bool MPU_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 MPU_Module_getMask();
// Returns the diagnostics mask for this module
Void MPU_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
enum MPU.AccessPerm |
|
Access Permissions
values of type MPU.AccessPerm
const MPU.AccessPerm_RW_PRIV;
// Read/write by privileged code only
const MPU.AccessPerm_RW_ANY;
// Read/write by any privilege level
const MPU.AccessPerm_RO_PRIV;
// Read only by privileged code only
const MPU.AccessPerm_RO_ANY;
// Read only by any privilege level
C SYNOPSIS
enum MPU.Shareable |
|
Shareability attribute
values of type MPU.Shareable
const MPU.Shareable_NONE;
const MPU.Shareable_OUTER;
const MPU.Shareable_INNER;
C SYNOPSIS
struct MPU.DeviceRegs |
|
Memory Protection Unit (MPU) registers. Symbol "MPU_deviceRegs" is
a physical device
var obj = new MPU.DeviceRegs;
obj.TYPE = UInt32 ...
// 0xD90 Type Register
obj.CTRL = UInt32 ...
// 0xD94 Control Register
obj.RNR = UInt32 ...
// 0xD98 Region Register
obj.RBAR = UInt32 ...
// 0xD9C Region Base Address Register
obj.RLAR = UInt32 ...
// 0xDA0 Region Base Limit Register
obj.RBAR_A1 = UInt32 ...
// 0xDA4 MPU RBAR Alias 1
obj.RLAR_A1 = UInt32 ...
// 0xDA8 MPU RLAR Alias 1
obj.RBAR_A2 = UInt32 ...
// 0xDAC MPU RBAR Alias 2
obj.RLAR_A2 = UInt32 ...
// 0xDB0 MPU RLAR Alias 2
obj.RBAR_A3 = UInt32 ...
// 0xDB4 MPU RBAR Alias 3
obj.RLAR_A3 = UInt32 ...
// 0xDB8 MPU RLAR Alias 3
obj.res0 = UInt32 ...
// 0xDBC Reserved
obj.MAIR0 = UInt32 ...
// 0xDC0 MAIR0
obj.MAIR1 = UInt32 ...
// 0xDC4 MAIR1
C SYNOPSIS
struct MPU.RegionAttrs |
|
Structure for setting protection attributes of a MPU region
var obj = new MPU.RegionAttrs;
obj.enable = Bool ...
// Is MPU region enabled
// Memory region shareability
obj.executable = Bool ...
// Is memory region executable
// Access permission
obj.attrIndx = UInt8 ...
// Memory attributes index field 0-7
C SYNOPSIS
config MPU.A_invalidRegionId // module-wide |
|
Assert raised when an invalid region number is passed to MPU_setRegion()
msg: "A_invalidRegionId: MPU Region number passed is invalid."
};
C SYNOPSIS
config MPU.A_nullPointer // module-wide |
|
Assert raised when a pointer is null
msg: "A_nullPointer: Pointer is null"
};
C SYNOPSIS
config MPU.A_unalignedBaseAddr // module-wide |
|
Assert raised when region's base address is not aligned
msg: "A_unalignedBaseAddr: MPU region base address not aligned."
};
C SYNOPSIS
config MPU.A_unalignedEndAddr // module-wide |
|
Assert raised when region's end address is not aligned
msg: "A_unalignedEndAddr: MPU region end address not aligned."
};
C SYNOPSIS
config MPU.MAIR0 // module-wide |
|
Memory attribute 0
DETAILS
Default is memory with non-gathering, non-reordering and no early write
acknowledegement property.
C SYNOPSIS
config MPU.MAIR1 // module-wide |
|
Memory attribute 1
DETAILS
Default is memory with non-gathering, non-reordering and early write
acknowledegement property.
C SYNOPSIS
config MPU.MAIR2 // module-wide |
|
Memory attribute 2
DETAILS
Default is memory with non-gathering, reordering and early write
acknowledegement property.
C SYNOPSIS
config MPU.MAIR3 // module-wide |
|
Memory attribute 3
DETAILS
Default is memory with gathering, reordering and early write
acknowledegement property.
C SYNOPSIS
config MPU.MAIR4 // module-wide |
|
Memory attribute 4
DETAILS
Default is normal outer & inner non-cacheable memory.
C SYNOPSIS
config MPU.MAIR5 // module-wide |
|
Memory attribute 5
DETAILS
Default is normal outer non-cacheable, inner write-back cacheable
non-transient memory.
C SYNOPSIS
config MPU.MAIR6 // module-wide |
|
Memory attribute 6
DETAILS
Default is normal outer & inner write-through cacheable non-transient
memory.
C SYNOPSIS
config MPU.MAIR7 // module-wide |
|
Memory attribute 7
DETAILS
Default is normal outer and inner write-back cacheable non-transient
memory.
C SYNOPSIS
config MPU.defaultAttrs // module-wide |
|
Default region attributes structure
enable: true,
executable: true,
attrIndx: 0
};
DETAILS
The default attributes structure marks the memory region as outer and
inner non-cacheable and non-shareable, with read-write access from
privileged code only.
C SYNOPSIS
config MPU.enableBackgroundRegion // module-wide |
|
Configuration parameter to enable background region
MPU.enableBackgroundRegion = Bool true;
DETAILS
If the MPU is enabled and background region is also enabled, any
privileged access that does not map to any MPU memory region is
handled using the default memory map.
- See the "Protected Memory System Architecture (PMSA)" chapter
in the ARM v8M Architecture Reference Manual for more info on
the default memory map.
C SYNOPSIS
config MPU.enableMPU // module-wide |
|
Configuration parameter to enable MPU. Disabled by default
MPU.enableMPU = Bool false;
C SYNOPSIS
metaonly config MPU.common$ // module-wide |
|
Common module configuration parameters
DETAILS
All modules have this configuration parameter. Its name
contains the '$' character to ensure it does not conflict with
configuration parameters declared by the module. This allows
new configuration parameters to be added in the future without
any chance of breaking existing modules.
metaonly config MPU.rovViewInfo // module-wide |
|
metaonly MPU.initRegionAttrsMeta() // module-wide |
|
Initializes the region attribute structure
ARGUMENTS
attrs
Pointer to region attribute struct
metaonly MPU.setRegionMeta() // module-wide |
|
Statically sets the MPU region attributes
MPU.
setRegionMeta(
UInt8 regionId,
Ptr regionBaseAddr,
Ptr regionEndAddr,
MPU.RegionAttrs attrs)
returns Void
ARGUMENTS
regionId
MPU region number
regionBaseAddr
MPU region base address
regionEndAddr
MPU region end address
attrs
Protection attributes
SEE