1 /*
2 * Copyright (c) 2017-2018, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * */
32
33 /*
34 * ======== Boot.xdc ========
35 */
36
37 package ti.sysbios.family.arm.msp432e4.init;
38
39 import xdc.rov.ViewInfo;
40
41 /*!
42 * ======== Boot ========
43 * MSP432E Boot Support.
44 *
45 * The Boot module supports boot initialization for the MSP432E devices.
46 * A special boot init function is created based on the configuration
47 * settings for this module. This function is hooked into the
48 * xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
49 * to cinit processing).
50 *
51 * The code to support the boot module is placed in a separate section
52 * named `".text:.bootCodeSection"` to allow placement of this section in
53 * the linker .cmd file if necessary. This section is a subsection of the
54 * `".text"` section so this code will be placed into the .text section unless
55 * explicitly placed, either through
56 * `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
57 * command file.
58 */
59 @Template("./Boot.xdt")
60 module Boot
61 {
62 metaonly struct ModuleView {
63 Bool configureClock;
64 String xtal;
65 String oscSrc;
66 Bool pllBypass;
67 Bool ioscDisable;
68 Bool moscDisable;
69 }
70
71 @Facet
72 metaonly config ViewInfo.Instance rovViewInfo =
73 ViewInfo.create({
74 viewMap: [
75 [
76 'Module',
77 {
78 type: ViewInfo.MODULE,
79 viewInitFxn: 'viewInitModule',
80 structName: 'ModuleView'
81 }
82 ],
83 ]
84 });
85
86 metaonly enum XtalFreq {
87 XTAL_5MHZ = 0x00000000, /*! 5 MHz */
88 XTAL_6MHZ = 0x00000040, /*! 6 MHz */
89 XTAL_8MHZ = 0x00000080, /*! 8 MHz */
90 XTAL_10MHZ = 0x000000C0, /*! 10 MHz */
91 XTAL_12MHZ = 0x00000100, /*! 12 MHz */
92 XTAL_16MHZ = 0x00000140, /*! 16 MHz */
93 XTAL_18MHZ = 0x00000180, /*! 18 MHz */
94 XTAL_20MHZ = 0x000001C0, /*! 20 MHz */
95 XTAL_24MHZ = 0x00000200, /*! 24 MHz */
96 XTAL_25MHZ = 0x00000240 /*! 25 MHz */
97 }
98
99 metaonly enum OscSrc {
100 OSCSRC_MAIN = 0x00000000, /*! Main oscillator */
101 OSCSRC_INT = 0x00000010, /*! Internal oscillator */
102 OSCSRC_INT4 = 0x00000020, /*! Internal oscillator / 4 */
103 OSCSRC_INT30 = 0x00000030, /*! Internal 30 KHz oscillator */
104 OSCSRC_EXT4_19 = 0x80000028, /*! External 4.19 MHz */
105 OSCSRC_EXT32 = 0x80000038 /*! External 32 KHz */
106 }
107
108 metaonly enum VcoFreq {
109 VCO_480 = 0xF1000000, /*! VCO is 480 MHz */
110 VCO_320 = 0xF0000000 /*! VCO is 320 MHz */
111 }
112
113 /*!
114 * Clock configuration flag, default is true.
115 */
116 metaonly config Bool configureClock = true;
117
118 /*! Crystal Value */
119 metaonly config XtalFreq xtal = XTAL_25MHZ;
120
121 /*! Oscillator Source */
122 metaonly config OscSrc oscSrc = OSCSRC_MAIN;
123
124 /*! VCO frequency */
125 metaonly config VcoFreq vcoFreq = VCO_480;
126
127 /*! PLL Bypass flag */
128 metaonly config Bool pllBypass = false;
129
130 /*! Internal Oscillator Disable flag */
131 metaonly config Bool ioscDisable = false;
132
133 /*! Main Oscillator Disable flag */
134 metaonly config Bool moscDisable = false;
135
136 /*!
137 * @_nodoc
138 * Enhanced Clocking Mode.
139 * This config parameter has been deprecated.
140 */
141 metaonly config Bool enhancedClockMode = true;
142
143 /*!
144 * Desired CPU Clock Frequency in Hz.
145 */
146 metaonly config UInt cpuFrequency = 120000000;
147
148 /*
149 * @_nodoc
150 * ======== sysCtlClockFreqSet ========
151 * Configures the system clock.
152 *
153 * wrapper for Boot_sysCtlClockFreqSetI()
154 *
155 * @param ulConfig is the required configuration of the device clocking.
156 * @param ulSysClock is the requested processor frequency.
157 *
158 * @return The actual configured system clock frequency in Hz or zero if
159 * the value could not be changed due to a parameter error or PLL lock
160 * failure.
161 */
162 @DirectCall
163 ULong sysCtlClockFreqSet(ULong ulConfig, ULong ulSysClock);
164
165 /*!
166 * @_nodoc
167 * ======== registerFreqListener ========
168 * Register a module to be notified whenever the frequency changes.
169 *
170 * The registered module must have a function named 'fireFrequencyUpdate'
171 * which takes the new frequency as an argument.
172 */
173 function registerFreqListener();
174
175 internal:
176
177 /*
178 * ======== sysCtlClockFreqSetI ========
179 * Configures the system clock.
180 *
181 * @param ulConfig is the required configuration of the device clocking.
182 * @param ulSysClock is the requested processor frequency.
183 *
184 * @return The actual configured system clock frequency in Hz or zero if
185 * the value could not be changed due to a parameter error or PLL lock
186 * failure.
187 */
188 ULong sysCtlClockFreqSetI(ULong ulConfig, ULong ulSysClock);
189
190 /*
191 * ======== init ========
192 * Generated entry point into clock initialization function.
193 *
194 * Installed as a Startup.firstFxn.
195 * Calls Boot_sysCtlClockFreqSet().
196 */
197 Void init();
198
199 /*!
200 * computed RCC value based on settings
201 */
202 metaonly config UInt ulConfig;
203
204 /*!
205 * computed cpu frequency based on clock settings
206 */
207 metaonly config UInt computedCpuFrequency;
208
209 };