module ti.sysbios.family.arm.a15.tci66xx.CpIntc

Chip-level Interrupt Controller Manager

This module manages the CP_INTC hardware. This module supports enabling and disabling of both system and host interrupts. This module also supports mapping system interrupts to host interrupts and host interrupts to Hwis. These functions are supported statically and during runtime for CP_INTC connected to the ARM generic interrupt controller. There is a dispatch function for handling ARM hardware interrupts triggered by a system interrupt. The Global Enable Register is enabled by default in the module startup function. [ more ... ]
C synopsis target-domain sourced in ti/sysbios/family/arm/a15/tci66xx/CpIntc.xdc
#include <ti/sysbios/family/arm/a15/tci66xx/CpIntc.h>
Functions
Void 
Void 
Void 
Void 
Void 
Void 
Void 
Void 
Void 
Int 
Int 
Int 
Void 
Void 
Functions common to all target modules
Typedefs
typedef Void 
typedef struct
Constants
extern const Assert_Id 
extern const Error_Id 
 
DETAILS
This module manages the CP_INTC hardware. This module supports enabling and disabling of both system and host interrupts. This module also supports mapping system interrupts to host interrupts and host interrupts to Hwis. These functions are supported statically and during runtime for CP_INTC connected to the ARM generic interrupt controller. There is a dispatch function for handling ARM hardware interrupts triggered by a system interrupt. The Global Enable Register is enabled by default in the module startup function.
System interrupts are those interrupts generated by a hardware module in the system. These interrupts are inputs into CP_INTC. Host interrupts are the output interrupts of CP_INTC. There is a one-to-one mapping between channels and host interrupts therefore, the term "host interrupt" is also used for channels.
                          +------------+------------+
                  ------->|\  Channel  |   Channel  |
                          | \ Mapping  |     to     |
                  ------->|\ \         |    Host    |
                          | \ \        |  Interrupt |
                  ------->|\ \ \       |   direct   |    Host
                          | \ \ \      |   mapping  | Interrupts
                  ------->|\ \ \ \     |            |           +-------+
                          | \ \ \ \    |____________|___________|       |
     System       ------->|\ \ \ \ \  /|            |           |       |
   Interrupts         :   | \ \ \ \ \/ |____________|___________|       |
                      :   |  \ \ \ \/\/|            |           |       |
                      :   |   \ \ \/\/\|____________|___________|       |
                      :   |    \ \/\/\/|            |           |       |
                      :   |     \/\/\/\|____________|___________|  ARM  |
                      :   |     /\/\/\/|            |           |  GIC  |
                      :   |    / /\/\/\|____________|___________|       |
                      :   |   / / /\/\/|            |           |       |
                      :   |  / / / /\/\|____________|___________|       |
                      :   | / / / / /\ |            |           |       |
                  ------->|/ / / / /  \|____________|___________|       |
                          | / / / /    |            |           |       |
                  ------->|/ / / /     |            |           +-------+
                          | / / /      |            |
                  ------->|/ / /       |            |
                          | / /        |            |
                  ------->|/ /         |            |
                          | /          |            |
                  ------->|/           |            |
                          +------------+------------+
This modules does not support prioritization, nesting, and vectorization.
An example of using CpIntc during runtime to plug the ISR handler for System interrupt 15 mapped to Host interrupt 18.
  Int intNum;
  Hwi_Params params;
  Error_Block eb;

  // Initialize the error block
  Error_init(&eb);

  // Map system interrupt 15 to Host interrupt 18
  CpIntc_mapSysIntToHostInt(15, 18);

  // Plug the function and argument for System interrupt 15 then enable it
  CpIntc_dispatchPlug(15, &myEvent15Fxn, 15, TRUE);

  // Enable Host interrupt 18
  CpIntc_enableHostInt(18);

  // Get the ARM Hwi interrupt number associated with Host interrupt 18
  intNum = CpIntc_getIntNum(18);

  // Initialize the Hwi parameters
  Hwi_Params_init(&params);

  // The arg must be set to the key returned by CpIntc_getHostIntKey()
  params.arg = (UInt)CpIntc_getHostIntKey(18);

  // Enable the interrupt vector
  params.enableInt = TRUE;

  // Create the Hwi on interrupt intNum then specify 'CpIntc_dispatch'
  // as the handler function.
  Hwi_create(intNum, &CpIntc_dispatch, &params, &eb);

An example of using CpIntc statically to plug the ISR handler for System interrupt 201 mapped to Host interrupt 90.
*.cfg code
  var Hwi = xdc.useModule('ti.sysbios.family.arm.gic.Hwi');
  var CpIntc = xdc.useModule('ti.sysbios.family.arm.a15.tci66xx.CpIntc');

  // Map System interrupt 201 to Host interrupt 90
  CpIntc.sysInts[201].fxn = "&mySysIntFxn";
  CpIntc.sysInts[201].arg = 90;
  CpIntc.sysInts[201].hostInt = 90;
  CpIntc.sysInts[201].enable = true;

  var intNum = CpIntc.getIntNumMeta(90);
  var params = new Hwi.Params();
  params.arg = CpIntc.getHostIntKeyMeta(90);
  Hwi.create(intNum, CpIntc.dispatch, params);
NOTE
If multiple system interrupts are mapped to the same host interrupt, the performance may deteriorate as the CpIntc_dispatch() function has to scan all SysInt to HostInt map registers to determine which system interrupts are mapped to the currently active host interrupt.

Calling Context

Function Hwi Swi Task Main Startup
clearSysInt Y Y Y Y Y
disableAllHostInts Y Y Y Y Y
disableHostInt Y Y Y Y Y
dispatch Y N N N N
disableHostInt Y Y Y Y Y
dispatchPlug Y Y Y Y N
enableAllHostInts Y Y Y Y Y
enableHostInt Y Y Y Y Y
enableSysInt Y Y Y Y Y
getHostInt Y Y Y Y N
getHostIntKey Y Y Y Y N
getIntNum Y Y Y Y N
mapSysIntToHostInt Y Y Y Y Y
postSysInt Y Y Y Y N
Definitions:
  • Hwi: API is callable from a Hwi thread.
  • Swi: API is callable from a Swi thread.
  • Task: API is callable from a Task thread.
  • Main: API is callable during any of these phases:
    • In your module startup after this module is started (e.g. CpIntc_Module_startupDone() returns TRUE).
    • During xdc.runtime.Startup.lastFxns.
    • During main().
    • During BIOS.startupFxns.
  • Startup: API is callable during any of these phases:
    • During xdc.runtime.Startup.firstFxns.
    • In your module startup before this module is started (e.g. CpIntc_Module_startupDone() returns FALSE).
 
typedef CpIntc_FuncPtr

CpIntc dispatcher function type definition

C synopsis target-domain
typedef Void (*CpIntc_FuncPtr)(UArg);
 
 
struct CpIntc_RegisterMap

Common Platform Interrupt Controller

C synopsis target-domain
typedef struct CpIntc_RegisterMap {
    UInt32 REV;
    // 0x00 Revision Register
    UInt32 CR;
    // 0x04 Control Register
    UInt32 RES_08;
    // 0x08 reserved
    UInt32 HCR;
    // 0x0C Host Control Register
    UInt32 GER;
    // 0x10 Global Enable Register
    UInt32 RES_14;
    // 0x14 reserved
    UInt32 RES_18;
    // 0x18 reserved
    UInt32 GNLR;
    // 0x1C Global Nesting Level Register
    UInt32 SISR;
    // 0x20 Status Index Set Register
    UInt32 SICR;
    // 0x24 Status Index Clear Register
    UInt32 EISR;
    // 0x28 Enable Index Set Register
    UInt32 EICR;
    // 0x2C Enable Index Clear Register
    UInt32 GWER;
    // 0x30 Global Wakeup Enable Register
    UInt32 HIEISR;
    // 0x34 Host Int Enable Index Set Register
    UInt32 HIDISR;
    // 0x38 Host Int Disable Index Set Register
    UInt32 RES_3C;
    // 0x3C reserved
    UInt32 PPR;
    // 0x40 Pacer Prescale Register
    UInt32 RES_44;
    // 0x44 reserved
    UInt32 RES_48;
    // 0x48 reserved
    UInt32 RES_4C;
    // 0x4C reserved
    Ptr *VBR;
    // 0x50 Vector Base Register
    UInt32 VSR;
    // 0x54 Vector Size Register
    Ptr VNR;
    // 0x58 Vector Null Register
    UInt32 RES_5C[9];
    // 0x5C-0x7C reserved
    Int32 GPIR;
    // 0x80 Global Prioritized Index Register
    Ptr *GPVR;
    // 0x84 Global Prioritized Vector Register
    UInt32 RES_88;
    // 0x88 reserved
    UInt32 RES_8C;
    // 0x8C reserved
    UInt32 GSIER;
    // 0x90 Global Secure Interrupt Enable Register
    UInt32 SPIR;
    // 0x94 Secure Prioritized Index Register
    UInt32 RES_98[26];
    // 0x98-0xFC reserved
    UInt32 PPMR[64];
    // 0x100-0x1FC Pacer Parameter/Map Registers
    UInt32 SRSR[32];
    // 0x200-0x27C Status Raw/Set Registers
    UInt32 SECR[32];
    // 0x280-0x2FC Status Enabled/Clear Registers
    UInt32 ESR[32];
    // 0x300-0x37C Enable Set Registers
    UInt32 ECR[32];
    // 0x380-0x3FC Enable Clear Registers
    UInt8 CMR[1024];
    // 0x400-0x7FC Channel Map Registers
    UInt8 HIMR[256];
    // 0x800-0x8FC Host Interrupt Map Registers
    UInt32 HIPIR[256];
    // 0x900-0xCFC Host Interrupt Pri Index Registers
    UInt32 PR[32];
    // 0xD00-0xD7C Polarity Registers
    UInt32 TR[32];
    // 0xD80-0xDFC Type Registers
    UInt32 WER[64];
    // 0xE00-0xEFC Wakeup Enable Registers
    UInt32 DSR[64];
    // 0xF00-0xFFC Debug Select Registers
    UInt32 SER[32];
    // 0x1000-0x107C Secure Enable Registers
    UInt32 SDR[32];
    // 0x1080-0x10FC Secure Disable Registers
    UInt32 HINLR[256];
    // 0x1100-0x14FC Host Interrupt Nesting Level Registers
    UInt32 HIER[8];
    // 0x1500-0x151F Host Interrupt Enable Registers
    UInt32 RES1520[56];
    // 0x1520-0x15FC Reserved
    Ptr *HIPVR[256];
    // 0x1600-0x19FC Host Interrupt Prioritized Vector
    UInt32 RES1A00[384];
    // 0x1A00-0x1FFC Reserved
} CpIntc_RegisterMap;
 
 
config CpIntc_A_sysIntOutOfRange  // module-wide

Assert raised when system interrupt is out of range

C synopsis target-domain
extern const Assert_Id CpIntc_A_sysIntOutOfRange;
 
 
config CpIntc_E_unpluggedSysInt  // module-wide

Error raised when an unplugged system interrupt is executed

C synopsis target-domain
extern const Error_Id CpIntc_E_unpluggedSysInt;
 
 
CpIntc_clearSysInt()  // module-wide

Clears the system interrupt

C synopsis target-domain
Void CpIntc_clearSysInt(UInt sysInt);
 
ARGUMENTS
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Status Indexed Clear Register.
 
CpIntc_disableAllHostInts()  // module-wide

Disables all host interrupts

C synopsis target-domain
Void CpIntc_disableAllHostInts();
 
DETAILS
Writes a 0 to the Global Enable Register. It does not override the individual host interrupt enable/disable bits.
 
CpIntc_disableHostInt()  // module-wide

Disables the host interrupt

C synopsis target-domain
Void CpIntc_disableHostInt(UInt hostInt);
 
ARGUMENTS
hostInt — host interrupt number
DETAILS
Writes the host interrupt number to the Host Interrupt Enable Index Clear Register.
 
CpIntc_disableSysInt()  // module-wide

Disables the system interrupt

C synopsis target-domain
Void CpIntc_disableSysInt(UInt sysInt);
 
ARGUMENTS
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Enable Indexed Clear Register.
 
CpIntc_dispatch()  // module-wide

The Interrupt service routine handler for CP_INTC events

C synopsis target-domain
Void CpIntc_dispatch(UArg hostInt);
 
ARGUMENTS
hostInt — host interrupt number
DETAILS
It is used internally, but can also be used by the user.
 
CpIntc_dispatchPlug()  // module-wide

Configures a CpIntc ISR dispatch entry

C synopsis target-domain
Void CpIntc_dispatchPlug(UInt sysInt, CpIntc_FuncPtr fxn, UArg arg, Bool unmask);
 
ARGUMENTS
sysInt — system interrupt number
fxn — function
arg — argument to function
unmask — bool to unmask interrupt
DETAILS
Plugs the function and argument for the specified system interrupt. Also enables the system interrupt if 'unmask' is set to 'true'. Function does not map the system interrupt to a Hwi interrupt.
 
CpIntc_enableAllHostInts()  // module-wide

Enables all host interrupts

C synopsis target-domain
Void CpIntc_enableAllHostInts();
 
DETAILS
Writes a 1 to the Global Enable Register. It does not override the individual host interrupt enable/disable bits.
 
CpIntc_enableHostInt()  // module-wide

Enables the host interrupt

C synopsis target-domain
Void CpIntc_enableHostInt(UInt hostInt);
 
ARGUMENTS
hostInt — host interrupt number
DETAILS
Writes the host interrupt number to the Host Interrupt Enable Indexed Set Register.
 
CpIntc_enableSysInt()  // module-wide

Enables the system interrupt

C synopsis target-domain
Void CpIntc_enableSysInt(UInt sysInt);
 
ARGUMENTS
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Enable Indexed Set Register.
 
CpIntc_getHostInt()  // module-wide

Returns the host interrupt associated with the ARM CorePac interrupt

C synopsis target-domain
Int CpIntc_getHostInt(UInt intNum);
 
ARGUMENTS
intNum — ARM CorePac interrupt number
RETURNS
Host interrupt number
DETAILS
If no host interrupt is associated with the ARM interrupt, the value -1 will be returned.
 
CpIntc_getHostIntKey()  // module-wide

Returns a key that should be passed as an argument to CpIntc_dispatch()

C synopsis target-domain
Int CpIntc_getHostIntKey(UInt hostInt);
 
ARGUMENTS
intNum — Host interrupt number
RETURNS
Key
DETAILS
If invalid host interrupt number is passed, the value -1 will be returned.
 
CpIntc_getIntNum()  // module-wide

Returns the Hwi interrupt number associated with the host interrupt

C synopsis target-domain
Int CpIntc_getIntNum(UInt hostInt);
 
ARGUMENTS
hostInt — host interrupt number
RETURNS
ARM interrupt number
DETAILS
If no ARM interrupt is associated with the host interrupt, the value -1 will be returned.
NOTE
ARM CorePac interrupt number 0 to N in Keystone2 reference manual maps to ARM GIC interrupt number 32 to (N + 32).
This function returns the ARM GIC interrupt number.
 
CpIntc_mapSysIntToHostInt()  // module-wide

Maps a system interrupt to a host interrupt

C synopsis target-domain
Void CpIntc_mapSysIntToHostInt(UInt sysInt, UInt hostInt);
 
ARGUMENTS
sysInt — system interrupt number
hostInt — host interrupt number
DETAILS
Writes the Channel Map Register to map a system interrupt to a channel. There is a 1 to 1 mapping between channels and host interrupts.
 
CpIntc_postSysInt()  // module-wide

Triggers the system interrupt

C synopsis target-domain
Void CpIntc_postSysInt(UInt sysInt);
 
ARGUMENTS
sysInt — system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt Status Index Set Register. Used for diagnostic and test purposes only.
Module-Wide Built-Ins

C synopsis target-domain
Types_ModuleId CpIntc_Module_id();
// Get this module's unique id
 
Bool CpIntc_Module_startupDone();
// Test if this module has completed startup
 
IHeap_Handle CpIntc_Module_heap();
// The heap from which this module allocates memory
 
Bool CpIntc_Module_hasMask();
// Test whether this module has a diagnostics mask
 
Bits16 CpIntc_Module_getMask();
// Returns the diagnostics mask for this module
 
Void CpIntc_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
 
Configuration settings sourced in ti/sysbios/family/arm/a15/tci66xx/CpIntc.xdc
var CpIntc = xdc.useModule('ti.sysbios.family.arm.a15.tci66xx.CpIntc');
module-wide constants & types
        obj.REV// 0x00 Revision Register = UInt32  ...
        obj.CR// 0x04 Control Register = UInt32  ...
        obj.RES_08// 0x08 reserved = UInt32  ...
        obj.HCR// 0x0C Host Control Register = UInt32  ...
        obj.GER// 0x10 Global Enable Register = UInt32  ...
        obj.RES_14// 0x14 reserved = UInt32  ...
        obj.RES_18// 0x18 reserved = UInt32  ...
        obj.GNLR// 0x1C Global Nesting Level Register = UInt32  ...
        obj.SISR// 0x20 Status Index Set Register = UInt32  ...
        obj.SICR// 0x24 Status Index Clear Register = UInt32  ...
        obj.EISR// 0x28 Enable Index Set Register = UInt32  ...
        obj.EICR// 0x2C Enable Index Clear Register = UInt32  ...
        obj.GWER// 0x30 Global Wakeup Enable Register = UInt32  ...
        obj.HIEISR// 0x34 Host Int Enable Index Set Register = UInt32  ...
        obj.HIDISR// 0x38 Host Int Disable Index Set Register = UInt32  ...
        obj.RES_3C// 0x3C reserved = UInt32  ...
        obj.PPR// 0x40 Pacer Prescale Register = UInt32  ...
        obj.RES_44// 0x44 reserved = UInt32  ...
        obj.RES_48// 0x48 reserved = UInt32  ...
        obj.RES_4C// 0x4C reserved = UInt32  ...
        obj.VBR// 0x50 Vector Base Register = Ptr*  ...
        obj.VSR// 0x54 Vector Size Register = UInt32  ...
        obj.VNR// 0x58 Vector Null Register = Ptr  ...
        obj.RES_5C// 0x5C-0x7C reserved = UInt32[9]  ...
        obj.GPIR// 0x80 Global Prioritized Index Register = Int32  ...
        obj.GPVR// 0x84 Global Prioritized Vector Register = Ptr*  ...
        obj.RES_88// 0x88 reserved = UInt32  ...
        obj.RES_8C// 0x8C reserved = UInt32  ...
        obj.GSIER// 0x90 Global Secure Interrupt Enable Register = UInt32  ...
        obj.SPIR// 0x94 Secure Prioritized Index Register = UInt32  ...
        obj.RES_98// 0x98-0xFC reserved = UInt32[26]  ...
        obj.PPMR// 0x100-0x1FC Pacer Parameter/Map Registers = UInt32[64]  ...
        obj.SRSR// 0x200-0x27C Status Raw/Set Registers = UInt32[32]  ...
        obj.SECR// 0x280-0x2FC Status Enabled/Clear Registers = UInt32[32]  ...
        obj.ESR// 0x300-0x37C Enable Set Registers = UInt32[32]  ...
        obj.ECR// 0x380-0x3FC Enable Clear Registers = UInt32[32]  ...
        obj.CMR// 0x400-0x7FC Channel Map Registers = UInt8[1024]  ...
        obj.HIMR// 0x800-0x8FC Host Interrupt Map Registers = UInt8[256]  ...
        obj.HIPIR// 0x900-0xCFC Host Interrupt Pri Index Registers = UInt32[256]  ...
        obj.PR// 0xD00-0xD7C Polarity Registers = UInt32[32]  ...
        obj.TR// 0xD80-0xDFC Type Registers = UInt32[32]  ...
        obj.WER// 0xE00-0xEFC Wakeup Enable Registers = UInt32[64]  ...
        obj.DSR// 0xF00-0xFFC Debug Select Registers = UInt32[64]  ...
        obj.SER// 0x1000-0x107C Secure Enable Registers = UInt32[32]  ...
        obj.SDR// 0x1080-0x10FC Secure Disable Registers = UInt32[32]  ...
        obj.HINLR// 0x1100-0x14FC Host Interrupt Nesting Level Registers = UInt32[256]  ...
        obj.HIER// 0x1500-0x151F Host Interrupt Enable Registers = UInt32[8]  ...
        obj.RES1520// 0x1520-0x15FC Reserved = UInt32[56]  ...
        obj.HIPVR// 0x1600-0x19FC Host Interrupt Prioritized Vector = Ptr*[256]  ...
        obj.RES1A00// 0x1A00-0x1FFC Reserved = UInt32[384]  ...
 
        obj.fxn = Void(*)(UArg)  ...
        obj.arg = UArg  ...
        obj.hostInt = UInt16  ...
        obj.enable = Bool  ...
module-wide config parameters
        msg: "A_sysIntOutOfRange: Sys Int number passed is invalid."
    };
        msg: "E_unpluggedSysInt: System Interrupt# %d is unplugged"
    };
 
module-wide functions
 
 
struct CpIntc.RegisterMap

Common Platform Interrupt Controller

Configuration settings
var obj = new CpIntc.RegisterMap;
 
    obj.REV = UInt32  ...
    // 0x00 Revision Register
    obj.CR = UInt32  ...
    // 0x04 Control Register
    obj.RES_08 = UInt32  ...
    // 0x08 reserved
    obj.HCR = UInt32  ...
    // 0x0C Host Control Register
    obj.GER = UInt32  ...
    // 0x10 Global Enable Register
    obj.RES_14 = UInt32  ...
    // 0x14 reserved
    obj.RES_18 = UInt32  ...
    // 0x18 reserved
    obj.GNLR = UInt32  ...
    // 0x1C Global Nesting Level Register
    obj.SISR = UInt32  ...
    // 0x20 Status Index Set Register
    obj.SICR = UInt32  ...
    // 0x24 Status Index Clear Register
    obj.EISR = UInt32  ...
    // 0x28 Enable Index Set Register
    obj.EICR = UInt32  ...
    // 0x2C Enable Index Clear Register
    obj.GWER = UInt32  ...
    // 0x30 Global Wakeup Enable Register
    obj.HIEISR = UInt32  ...
    // 0x34 Host Int Enable Index Set Register
    obj.HIDISR = UInt32  ...
    // 0x38 Host Int Disable Index Set Register
    obj.RES_3C = UInt32  ...
    // 0x3C reserved
    obj.PPR = UInt32  ...
    // 0x40 Pacer Prescale Register
    obj.RES_44 = UInt32  ...
    // 0x44 reserved
    obj.RES_48 = UInt32  ...
    // 0x48 reserved
    obj.RES_4C = UInt32  ...
    // 0x4C reserved
    obj.VBR = Ptr*  ...
    // 0x50 Vector Base Register
    obj.VSR = UInt32  ...
    // 0x54 Vector Size Register
    obj.VNR = Ptr  ...
    // 0x58 Vector Null Register
    obj.RES_5C = UInt32[9]  ...
    // 0x5C-0x7C reserved
    obj.GPIR = Int32  ...
    // 0x80 Global Prioritized Index Register
    obj.GPVR = Ptr*  ...
    // 0x84 Global Prioritized Vector Register
    obj.RES_88 = UInt32  ...
    // 0x88 reserved
    obj.RES_8C = UInt32  ...
    // 0x8C reserved
    obj.GSIER = UInt32  ...
    // 0x90 Global Secure Interrupt Enable Register
    obj.SPIR = UInt32  ...
    // 0x94 Secure Prioritized Index Register
    obj.RES_98 = UInt32[26]  ...
    // 0x98-0xFC reserved
    obj.PPMR = UInt32[64]  ...
    // 0x100-0x1FC Pacer Parameter/Map Registers
    obj.SRSR = UInt32[32]  ...
    // 0x200-0x27C Status Raw/Set Registers
    obj.SECR = UInt32[32]  ...
    // 0x280-0x2FC Status Enabled/Clear Registers
    obj.ESR = UInt32[32]  ...
    // 0x300-0x37C Enable Set Registers
    obj.ECR = UInt32[32]  ...
    // 0x380-0x3FC Enable Clear Registers
    obj.CMR = UInt8[1024]  ...
    // 0x400-0x7FC Channel Map Registers
    obj.HIMR = UInt8[256]  ...
    // 0x800-0x8FC Host Interrupt Map Registers
    obj.HIPIR = UInt32[256]  ...
    // 0x900-0xCFC Host Interrupt Pri Index Registers
    obj.PR = UInt32[32]  ...
    // 0xD00-0xD7C Polarity Registers
    obj.TR = UInt32[32]  ...
    // 0xD80-0xDFC Type Registers
    obj.WER = UInt32[64]  ...
    // 0xE00-0xEFC Wakeup Enable Registers
    obj.DSR = UInt32[64]  ...
    // 0xF00-0xFFC Debug Select Registers
    obj.SER = UInt32[32]  ...
    // 0x1000-0x107C Secure Enable Registers
    obj.SDR = UInt32[32]  ...
    // 0x1080-0x10FC Secure Disable Registers
    obj.HINLR = UInt32[256]  ...
    // 0x1100-0x14FC Host Interrupt Nesting Level Registers
    obj.HIER = UInt32[8]  ...
    // 0x1500-0x151F Host Interrupt Enable Registers
    obj.RES1520 = UInt32[56]  ...
    // 0x1520-0x15FC Reserved
    obj.HIPVR = Ptr*[256]  ...
    // 0x1600-0x19FC Host Interrupt Prioritized Vector
    obj.RES1A00 = UInt32[384]  ...
    // 0x1A00-0x1FFC Reserved
 
C SYNOPSIS
 
metaonly struct CpIntc.SysIntObj

System Interrupt Object

Configuration settings
var obj = new CpIntc.SysIntObj;
 
    obj.fxn = Void(*)(UArg)  ...
    obj.arg = UArg  ...
    obj.hostInt = UInt16  ...
    obj.enable = Bool  ...
 
 
config CpIntc.A_sysIntOutOfRange  // module-wide

Assert raised when system interrupt is out of range

Configuration settings
CpIntc.A_sysIntOutOfRange = Assert.Desc {
    msg: "A_sysIntOutOfRange: Sys Int number passed is invalid."
};
 
C SYNOPSIS
 
config CpIntc.E_unpluggedSysInt  // module-wide

Error raised when an unplugged system interrupt is executed

Configuration settings
CpIntc.E_unpluggedSysInt = Error.Desc {
    msg: "E_unpluggedSysInt: System Interrupt# %d is unplugged"
};
 
C SYNOPSIS
 
metaonly config CpIntc.common$  // module-wide

Common module configuration parameters

Configuration settings
CpIntc.common$ = Types.Common$ undefined;
 
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
 
metaonly config CpIntc.sysInts  // module-wide

Used for configuring the system interrupts

Configuration settings
CpIntc.sysInts = CpIntc.SysIntObj[] undefined;
 
DETAILS
During static configuration this array can be used to configure the function to execute when a system interrupt is triggered, the arg to the function, the host interrupt to which the system interrupt is mapped too, and whether to enable the system interrupt.
 
metaonly CpIntc.getHostIntKeyMeta()  // module-wide

Returns a key that should be passed as an argument to CpIntc_dispatch()

Configuration settings
CpIntc.getHostIntKeyMeta(UInt hostInt) returns Int
 
ARGUMENTS
intNum — Host interrupt number
RETURNS
Key
DETAILS
If invalid host interrupt number is passed, the value -1 will be returned.
 
metaonly CpIntc.getIntNumMeta()  // module-wide

Returns the Hwi interrupt number associated with the host interrupt

Configuration settings
CpIntc.getIntNumMeta(UInt hostInt) returns Int
 
ARGUMENTS
hostInt — host interrupt number
RETURNS
ARM interrupt number
DETAILS
If no ARM interrupt is associated with the host interrupt, the value -1 will be returned.
NOTE
ARM CorePac interrupt number 0 to N in Keystone2 reference manual maps to ARM GIC interrupt number 32 to (N + 32).
This function returns the ARM GIC interrupt number.
generated on Thu, 23 May 2019 00:22:34 GMT