This module manages the CP_INTC hardware. This module supports enabling
and disabling of both system and host interrupts. This module also
supports mapping system interrupts to host interrupts and host interrupts
to Hwis. These functions are supported statically and during runtime for
CP_INTC connected to the ARM generic interrupt controller. There is a
dispatch function for handling ARM hardware interrupts triggered by a system
interrupt. The Global Enable Register is enabled by default in the module
startup function.
System interrupts are those interrupts generated by a hardware module
in the system. These interrupts are inputs into CP_INTC.
Host interrupts are the output interrupts of CP_INTC.
There is a one-to-one mapping between channels and host interrupts
therefore, the term "host interrupt" is also used for channels.
This modules does not support prioritization, nesting, and vectorization.
An example of using CpIntc during runtime to plug the ISR handler for
System interrupt 15 mapped to Host interrupt 18.
Int intNum;
Hwi_Params params;
Error_Block eb;
// Initialize the error block
Error_init(&eb);
// Map system interrupt 15 to Host interrupt 18
CpIntc_mapSysIntToHostInt(15, 18);
// Plug the function and argument for System interrupt 15 then enable it
CpIntc_dispatchPlug(15, &myEvent15Fxn, 15, TRUE);
// Enable Host interrupt 18
CpIntc_enableHostInt(18);
// Get the ARM Hwi interrupt number associated with Host interrupt 18
intNum = CpIntc_getIntNum(18);
// Initialize the Hwi parameters
Hwi_Params_init(¶ms);
// The arg must be set to the key returned by CpIntc_getHostIntKey()
params.arg = (UInt)CpIntc_getHostIntKey(18);
// Enable the interrupt vector
params.enableInt = TRUE;
// Create the Hwi on interrupt intNum then specify 'CpIntc_dispatch'
// as the handler function.
Hwi_create(intNum, &CpIntc_dispatch, ¶ms, &eb);
An example of using CpIntc statically to plug the ISR handler for System
interrupt 201 mapped to Host interrupt 90.
If multiple system interrupts are mapped to the same host interrupt, the
performance may deteriorate as the CpIntc_dispatch() function has to
scan all SysInt to HostInt map registers to determine which system
interrupts are mapped to the currently active host interrupt.
typedef CpIntc_FuncPtr |
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CpIntc dispatcher function type definition
typedef Void (*CpIntc_FuncPtr)(UArg);
struct CpIntc_RegisterMap |
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Common Platform Interrupt Controller
typedef struct CpIntc_RegisterMap {
UInt32 REV;
// 0x00 Revision Register
UInt32 CR;
// 0x04 Control Register
UInt32 RES_08;
// 0x08 reserved
UInt32 HCR;
// 0x0C Host Control Register
UInt32 GER;
// 0x10 Global Enable Register
UInt32 RES_14;
// 0x14 reserved
UInt32 RES_18;
// 0x18 reserved
UInt32 GNLR;
// 0x1C Global Nesting Level Register
UInt32 SISR;
// 0x20 Status Index Set Register
UInt32 SICR;
// 0x24 Status Index Clear Register
UInt32 EISR;
// 0x28 Enable Index Set Register
UInt32 EICR;
// 0x2C Enable Index Clear Register
UInt32 GWER;
// 0x30 Global Wakeup Enable Register
UInt32 HIEISR;
// 0x34 Host Int Enable Index Set Register
UInt32 HIDISR;
// 0x38 Host Int Disable Index Set Register
UInt32 RES_3C;
// 0x3C reserved
UInt32 PPR;
// 0x40 Pacer Prescale Register
UInt32 RES_44;
// 0x44 reserved
UInt32 RES_48;
// 0x48 reserved
UInt32 RES_4C;
// 0x4C reserved
Ptr *VBR;
// 0x50 Vector Base Register
UInt32 VSR;
// 0x54 Vector Size Register
Ptr VNR;
// 0x58 Vector Null Register
UInt32 RES_5C[9];
// 0x5C-0x7C reserved
Int32 GPIR;
// 0x80 Global Prioritized Index Register
Ptr *GPVR;
// 0x84 Global Prioritized Vector Register
UInt32 RES_88;
// 0x88 reserved
UInt32 RES_8C;
// 0x8C reserved
UInt32 GSIER;
// 0x90 Global Secure Interrupt Enable Register
UInt32 SPIR;
// 0x94 Secure Prioritized Index Register
UInt32 RES_98[26];
// 0x98-0xFC reserved
UInt32 PPMR[64];
// 0x100-0x1FC Pacer Parameter/Map Registers
UInt32 SRSR[32];
// 0x200-0x27C Status Raw/Set Registers
UInt32 SECR[32];
// 0x280-0x2FC Status Enabled/Clear Registers
UInt32 ESR[32];
// 0x300-0x37C Enable Set Registers
UInt32 ECR[32];
// 0x380-0x3FC Enable Clear Registers
UInt8 CMR[1024];
// 0x400-0x7FC Channel Map Registers
UInt8 HIMR[256];
// 0x800-0x8FC Host Interrupt Map Registers
UInt32 HIPIR[256];
// 0x900-0xCFC Host Interrupt Pri Index
Registers
UInt32 PR[32];
// 0xD00-0xD7C Polarity Registers
UInt32 TR[32];
// 0xD80-0xDFC Type Registers
UInt32 WER[64];
// 0xE00-0xEFC Wakeup Enable Registers
UInt32 DSR[64];
// 0xF00-0xFFC Debug Select Registers
UInt32 SER[32];
// 0x1000-0x107C Secure Enable Registers
UInt32 SDR[32];
// 0x1080-0x10FC Secure Disable Registers
UInt32 HINLR[256];
// 0x1100-0x14FC Host Interrupt Nesting Level
Registers
UInt32 HIER[8];
// 0x1500-0x151F Host Interrupt Enable Registers
UInt32 RES1520[56];
// 0x1520-0x15FC Reserved
Ptr *HIPVR[256];
// 0x1600-0x19FC Host Interrupt Prioritized
Vector
UInt32 RES1A00[384];
// 0x1A00-0x1FFC Reserved
} CpIntc_RegisterMap;
config CpIntc_A_sysIntOutOfRange // module-wide |
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Assert raised when system interrupt is out of range
extern const Assert_Id CpIntc_A_sysIntOutOfRange;
config CpIntc_E_unpluggedSysInt // module-wide |
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Error raised when an unplugged system interrupt is executed
extern const Error_Id CpIntc_E_unpluggedSysInt;
CpIntc_clearSysInt() // module-wide |
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Clears the system interrupt
Void CpIntc_clearSysInt(UInt sysInt);
ARGUMENTS
sysInt
system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt
Status Indexed Clear Register.
CpIntc_disableAllHostInts() // module-wide |
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Disables all host interrupts
Void CpIntc_disableAllHostInts();
DETAILS
Writes a 0 to the Global Enable Register. It does not
override the individual host interrupt enable/disable bits.
CpIntc_disableHostInt() // module-wide |
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Disables the host interrupt
Void CpIntc_disableHostInt(UInt hostInt);
ARGUMENTS
hostInt
host interrupt number
DETAILS
Writes the host interrupt number to the Host Interrupt
Enable Index Clear Register.
CpIntc_disableSysInt() // module-wide |
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Disables the system interrupt
Void CpIntc_disableSysInt(UInt sysInt);
ARGUMENTS
sysInt
system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt
Enable Indexed Clear Register.
CpIntc_dispatch() // module-wide |
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The Interrupt service routine handler for CP_INTC events
Void CpIntc_dispatch(UArg hostInt);
ARGUMENTS
hostInt
host interrupt number
DETAILS
It is used internally, but can also be used by the user.
CpIntc_dispatchPlug() // module-wide |
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Configures a CpIntc ISR dispatch entry
Void CpIntc_dispatchPlug(
UInt sysInt,
CpIntc_FuncPtr fxn,
UArg arg,
Bool unmask);
ARGUMENTS
sysInt
system interrupt number
fxn
function
arg
argument to function
unmask
bool to unmask interrupt
DETAILS
Plugs the function and argument for the specified system interrupt.
Also enables the system interrupt if 'unmask' is set to 'true'.
Function does not map the system interrupt to a Hwi interrupt.
CpIntc_enableAllHostInts() // module-wide |
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Enables all host interrupts
Void CpIntc_enableAllHostInts();
DETAILS
Writes a 1 to the Global Enable Register. It does not
override the individual host interrupt enable/disable bits.
CpIntc_enableHostInt() // module-wide |
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Enables the host interrupt
Void CpIntc_enableHostInt(UInt hostInt);
ARGUMENTS
hostInt
host interrupt number
DETAILS
Writes the host interrupt number to the Host Interrupt
Enable Indexed Set Register.
CpIntc_enableSysInt() // module-wide |
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Enables the system interrupt
Void CpIntc_enableSysInt(UInt sysInt);
ARGUMENTS
sysInt
system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt
Enable Indexed Set Register.
CpIntc_getHostInt() // module-wide |
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Returns the host interrupt associated with the ARM CorePac interrupt
Int CpIntc_getHostInt(UInt intNum);
ARGUMENTS
intNum
ARM CorePac interrupt number
RETURNS
Host interrupt number
DETAILS
If no host interrupt is associated with the ARM interrupt, the value
-1 will be returned.
CpIntc_getHostIntKey() // module-wide |
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Returns a key that should be passed as an argument to CpIntc_dispatch()
Int CpIntc_getHostIntKey(UInt hostInt);
ARGUMENTS
intNum
Host interrupt number
RETURNS
Key
DETAILS
If invalid host interrupt number is passed, the value -1 will be
returned.
CpIntc_getIntNum() // module-wide |
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Returns the Hwi interrupt number associated with the host
interrupt
Int CpIntc_getIntNum(UInt hostInt);
ARGUMENTS
hostInt
host interrupt number
RETURNS
ARM interrupt number
DETAILS
If no ARM interrupt is associated with the host interrupt, the value
-1 will be returned.
NOTE
ARM CorePac interrupt number 0 to N in Keystone2 reference manual
maps to ARM GIC interrupt number 32 to (N + 32).
This function returns the ARM GIC interrupt number.
CpIntc_mapSysIntToHostInt() // module-wide |
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Maps a system interrupt to a host interrupt
Void CpIntc_mapSysIntToHostInt(UInt sysInt, UInt hostInt);
ARGUMENTS
sysInt
system interrupt number
hostInt
host interrupt number
DETAILS
Writes the Channel Map Register to map a system interrupt to a
channel. There is a 1 to 1 mapping between channels and
host interrupts.
CpIntc_postSysInt() // module-wide |
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Triggers the system interrupt
Void CpIntc_postSysInt(UInt sysInt);
ARGUMENTS
sysInt
system interrupt number
DETAILS
Writes the system interrupt number to the System Interrupt
Status Index Set Register. Used for diagnostic and test purposes
only.
Module-Wide Built-Ins |
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// Get this module's unique id
Bool CpIntc_Module_startupDone();
// Test if this module has completed startup
// The heap from which this module allocates memory
Bool CpIntc_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 CpIntc_Module_getMask();
// Returns the diagnostics mask for this module
Void CpIntc_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
struct CpIntc.RegisterMap |
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Common Platform Interrupt Controller
var obj = new CpIntc.RegisterMap;
obj.REV = UInt32 ...
// 0x00 Revision Register
obj.CR = UInt32 ...
// 0x04 Control Register
obj.RES_08 = UInt32 ...
// 0x08 reserved
obj.HCR = UInt32 ...
// 0x0C Host Control Register
obj.GER = UInt32 ...
// 0x10 Global Enable Register
obj.RES_14 = UInt32 ...
// 0x14 reserved
obj.RES_18 = UInt32 ...
// 0x18 reserved
obj.GNLR = UInt32 ...
// 0x1C Global Nesting Level Register
obj.SISR = UInt32 ...
// 0x20 Status Index Set Register
obj.SICR = UInt32 ...
// 0x24 Status Index Clear Register
obj.EISR = UInt32 ...
// 0x28 Enable Index Set Register
obj.EICR = UInt32 ...
// 0x2C Enable Index Clear Register
obj.GWER = UInt32 ...
// 0x30 Global Wakeup Enable Register
obj.HIEISR = UInt32 ...
// 0x34 Host Int Enable Index Set Register
obj.HIDISR = UInt32 ...
// 0x38 Host Int Disable Index Set Register
obj.RES_3C = UInt32 ...
// 0x3C reserved
obj.PPR = UInt32 ...
// 0x40 Pacer Prescale Register
obj.RES_44 = UInt32 ...
// 0x44 reserved
obj.RES_48 = UInt32 ...
// 0x48 reserved
obj.RES_4C = UInt32 ...
// 0x4C reserved
obj.VBR = Ptr* ...
// 0x50 Vector Base Register
obj.VSR = UInt32 ...
// 0x54 Vector Size Register
obj.VNR = Ptr ...
// 0x58 Vector Null Register
obj.RES_5C = UInt32[9] ...
// 0x5C-0x7C reserved
obj.GPIR = Int32 ...
// 0x80 Global Prioritized Index Register
obj.GPVR = Ptr* ...
// 0x84 Global Prioritized Vector Register
obj.RES_88 = UInt32 ...
// 0x88 reserved
obj.RES_8C = UInt32 ...
// 0x8C reserved
obj.GSIER = UInt32 ...
// 0x90 Global Secure Interrupt Enable Register
obj.SPIR = UInt32 ...
// 0x94 Secure Prioritized Index Register
obj.RES_98 = UInt32[26] ...
// 0x98-0xFC reserved
obj.PPMR = UInt32[64] ...
// 0x100-0x1FC Pacer Parameter/Map Registers
obj.SRSR = UInt32[32] ...
// 0x200-0x27C Status Raw/Set Registers
obj.SECR = UInt32[32] ...
// 0x280-0x2FC Status Enabled/Clear Registers
obj.ESR = UInt32[32] ...
// 0x300-0x37C Enable Set Registers
obj.ECR = UInt32[32] ...
// 0x380-0x3FC Enable Clear Registers
obj.CMR = UInt8[1024] ...
// 0x400-0x7FC Channel Map Registers
obj.HIMR = UInt8[256] ...
// 0x800-0x8FC Host Interrupt Map Registers
obj.HIPIR = UInt32[256] ...
// 0x900-0xCFC Host Interrupt Pri Index
Registers
obj.PR = UInt32[32] ...
// 0xD00-0xD7C Polarity Registers
obj.TR = UInt32[32] ...
// 0xD80-0xDFC Type Registers
obj.WER = UInt32[64] ...
// 0xE00-0xEFC Wakeup Enable Registers
obj.DSR = UInt32[64] ...
// 0xF00-0xFFC Debug Select Registers
obj.SER = UInt32[32] ...
// 0x1000-0x107C Secure Enable Registers
obj.SDR = UInt32[32] ...
// 0x1080-0x10FC Secure Disable Registers
obj.HINLR = UInt32[256] ...
// 0x1100-0x14FC Host Interrupt Nesting Level
Registers
obj.HIER = UInt32[8] ...
// 0x1500-0x151F Host Interrupt Enable Registers
obj.RES1520 = UInt32[56] ...
// 0x1520-0x15FC Reserved
obj.HIPVR = Ptr*[256] ...
// 0x1600-0x19FC Host Interrupt Prioritized
Vector
obj.RES1A00 = UInt32[384] ...
// 0x1A00-0x1FFC Reserved
C SYNOPSIS
metaonly struct CpIntc.SysIntObj |
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System Interrupt Object
var obj = new CpIntc.SysIntObj;
obj.fxn = Void(*)(UArg) ...
obj.arg = UArg ...
obj.hostInt = UInt16 ...
obj.enable = Bool ...
config CpIntc.A_sysIntOutOfRange // module-wide |
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Assert raised when system interrupt is out of range
msg: "A_sysIntOutOfRange: Sys Int number passed is invalid."
};
C SYNOPSIS
config CpIntc.E_unpluggedSysInt // module-wide |
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Error raised when an unplugged system interrupt is executed
msg: "E_unpluggedSysInt: System Interrupt# %d is unplugged"
};
C SYNOPSIS
metaonly config CpIntc.common$ // module-wide |
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Common module configuration parameters
DETAILS
All modules have this configuration parameter. Its name
contains the '$' character to ensure it does not conflict with
configuration parameters declared by the module. This allows
new configuration parameters to be added in the future without
any chance of breaking existing modules.
metaonly config CpIntc.sysInts // module-wide |
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Used for configuring the system interrupts
DETAILS
During static configuration this array can be used to configure
the function to execute when a system interrupt is triggered,
the arg to the function, the host interrupt to which the system
interrupt is mapped too, and whether to enable the system interrupt.
metaonly CpIntc.getHostIntKeyMeta() // module-wide |
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Returns a key that should be passed as an argument to CpIntc_dispatch()
CpIntc.getHostIntKeyMeta(UInt hostInt) returns Int
ARGUMENTS
intNum
Host interrupt number
RETURNS
Key
DETAILS
If invalid host interrupt number is passed, the value -1 will be
returned.
metaonly CpIntc.getIntNumMeta() // module-wide |
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Returns the Hwi interrupt number associated with the host
interrupt
CpIntc.getIntNumMeta(UInt hostInt) returns Int
ARGUMENTS
hostInt
host interrupt number
RETURNS
ARM interrupt number
DETAILS
If no ARM interrupt is associated with the host interrupt, the value
-1 will be returned.
NOTE
ARM CorePac interrupt number 0 to N in Keystone2 reference manual
maps to ARM GIC interrupt number 32 to (N + 32).
This function returns the ARM GIC interrupt number.