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32
33 34 35 36
37 package ti.catalog.c6000;
38
39 /*!
40 * ======== TMS320DA802 ========
41 * The DA802 device data sheet module.
42 */
43 metaonly module TMS320DA802 inherits ITMS320DA8xx
44 {
45 override config long cacheSizeL2[string] = [
46 ["0k", 0x00000],
47 ["32k", 0x08000],
48 ["64k", 0x10000],
49 ["128k", 0x20000]
50 ];
51
52 override readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
53 ['l1PMode',{desc:"L1P Cache",
54 base: 0x11E00000,
55 map : [["0k",0x0000],
56 ["4k",0x1000],
57 ["8k",0x2000],
58 ["16k",0x4000],
59 ["32k",0x8000]],
60 defaultValue: "32k",
61 memorySection: "L1PSRAM"}],
62
63 ['l1DMode',{desc:"L1D Cache",
64 base: 0x11F00000,
65 map : [["0k",0x0000],
66 ["4k",0x1000],
67 ["8k",0x2000],
68 ["16k",0x4000],
69 ["32k",0x8000]],
70 defaultValue: "32k",
71 memorySection: "L1DSRAM"}],
72
73 ['l2Mode',{desc:"L2 Cache",
74 base: 0x11800000,
75 map : [["0k",0x0000],
76 ["32k",0x8000],
77 ["64k",0x10000],
78 ["128k",0x20000]],
79 defaultValue: "0k",
80 memorySection: "IRAM"}],
81
82 ];
83
84
85 instance:
86
87 /*!
88 * ======== memMap ========
89 * The default memory map for this device
90 */
91 override config xdc.platform.IPlatform.Memory memMap[string] = [
92 ["IROM", {
93 comment: "Internal 1MB L2 ROM",
94 name: "IROM",
95 base: 0x11700000,
96 len: 0x00100000,
97 space: "code/data",
98 access: "RX"
99 }],
100
101 ["IRAM", {
102 comment: "Internal 128KB L2 memory",
103 name: "IRAM",
104 base: 0x11800000,
105 len: 0x00020000,
106 space: "code/data",
107 access: "RWX"
108 }],
109
110 ["L1PSRAM", {
111 comment: "Internal 32KB L1 program memory",
112 name: "L1PSRAM",
113 base: 0x11E00000,
114 len: 0x00008000,
115 space: "code",
116 access: "RWX"
117 }],
118
119 ["L1DSRAM", {
120 comment: "Internal 32KB L1 data memory",
121 name: "L1DSRAM",
122 base: 0x11F00000,
123 len: 0x00008000,
124 space: "data",
125 access: "RW"
126 }],
127 ];
128 };