1 /* 2 * Copyright (c) 2016, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * ======== ITMS320C6x1x.xdc ======== 35 * 36 */ 37 package ti.catalog.c6000; 38 39 /*! 40 * ======== ITMS320C6x1x ======== 41 * An interface implemented by all TMS320C6x1x devices. 42 * 43 * This interface is defined to factor common data about this family into 44 * a single place; all TMS320C6x1x devices extend this interface. 45 */ 46 metaonly interface ITMS320C6x1x inherits ti.catalog.ICpuDataSheet 47 { 48 config long cacheSize[string] = [ 49 ["SRAM", 0x0000], 50 ["1-way cache", 0x4000], 51 ["2-way cache", 0x8000], 52 ["3-way cache", 0xc000], 53 ["4-way cache", 0x10000], 54 ["0k", 0x0000], 55 ["16k", 0x4000], 56 ["32k", 0x8000], 57 ["48k", 0xc000], 58 ["64k", 0x10000], 59 ]; 60 61 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [ 62 ['l2Mode',{desc:"L2 Cache", 63 map : [["SRAM",0x0000], 64 ["1-way cache",0x4000], 65 ["2-way cache",0x8000], 66 ["3-way cache",0xc000], 67 ["4-way cache",0x10000]], 68 defaultValue: "4-way cache", 69 memorySection: "IRAM"}] 70 ]; 71 72 instance: 73 override config string cpuCoreRevision = "1.0"; 74 75 override config int minProgUnitSize = 1; 76 override config int minDataUnitSize = 1; 77 override config int dataWordSize = 4; 78 79 /*! 80 * ======== memMap ======== 81 * The default memory map for this device 82 */ 83 config xdc.platform.IPlatform.Memory memMap[string]; 84 }