1 /*
2 * Copyright (c) 2016, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * ======== ITMS320C6655.xdc ========
35 *
36 */
37
38 package ti.catalog.c6000;
39
40 metaonly interface ITMS320C6655 inherits ti.catalog.ICpuDataSheet
41 {
42 config long cacheSizeL1[string] = [
43 ["0k", 0x0000],
44 ["4k", 0x1000],
45 ["8k", 0x2000],
46 ["16k", 0x4000],
47 ["32k", 0x8000],
48 ];
49
50 config long cacheSizeL2[string] = [
51 ["0k", 0x000000],
52 ["32k", 0x008000],
53 ["64k", 0x010000],
54 ["128k", 0x020000],
55 ["256k", 0x040000],
56 ["512k", 0x080000],
57 ["1024k", 0x100000]
58 ];
59
60 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
61 ['l1PMode', {
62 desc:"L1P Cache",
63 base: 0x00E00000,
64 map : [
65 ["0k",0x0000],
66 ["4k",0x1000],
67 ["8k",0x2000],
68 ["16k",0x4000],
69 ["32k",0x8000]
70 ],
71 defaultValue: "32k",
72 memorySection: "L1PSRAM"
73 }],
74 ['l1DMode', {
75 desc:"L1D Cache",
76 base: 0x00F00000,
77 map : [
78 ["0k",0x0000],
79 ["4k",0x1000],
80 ["8k",0x2000],
81 ["16k",0x4000],
82 ["32k",0x8000]
83 ],
84 defaultValue: "32k",
85 memorySection: "L1DSRAM"
86 }],
87 ['l2Mode', {
88 desc:"L2 Cache",
89 base: 0x00800000,
90 map : [
91 ["0k",0x0000],
92 ["32k",0x8000],
93 ["64k",0x10000],
94 ["128k",0x020000],
95 ["256k",0x040000],
96 ["512k",0x080000],
97 ["1024k", 0x100000]
98 ],
99 defaultValue: "0k",
100 memorySection: "L2SRAM"
101 }],
102 ];
103
104 instance:
105
106 override config string cpuCore = "6600";
107 override config string isa = "66";
108 override config string cpuCoreRevision = "1.0";
109
110 override config int minProgUnitSize = 1;
111 override config int minDataUnitSize = 1;
112 override config int dataWordSize = 4;
113
114 /*!
115 * ======== memMap ========
116 * The default memory map for this device
117 */
118 config xdc.platform.IPlatform.Memory memMap[string] = [
119 ["L2SRAM", {
120 comment: "1MB L2 SRAM/CACHE",
121 name: "L2SRAM",
122 base: 0x00800000,
123 len: 0x00100000,
124 space: "code/data",
125 access: "RWX"
126 }],
127
128 ["L1PSRAM", {
129 comment: "32KB RAM/CACHE L1 program memory",
130 name: "L1PSRAM",
131 base: 0x00E00000,
132 len: 0x00008000,
133 space: "code",
134 access: "RWX"
135 }],
136
137 ["L1DSRAM", {
138 comment: "32KB RAM/CACHE L1 data memory",
139 name: "L1DSRAM",
140 base: 0x00F00000,
141 len: 0x00008000,
142 space: "data",
143 access: "RW"
144 }],
145
146 ["MSMCSRAM", {
147 comment: "1MB MSMC SRAM",
148 name: "MSMCSRAM",
149 base: 0x0C000000,
150 len: 0x00100000,
151 space: "code/data",
152 access: "RWX"
153 }],
154 ];
155 };