1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32
33 34 35 36
37 package ti.catalog.c6000;
38
39 /*!
40 * ======== ITMS320C64_1M ========
41 * An interface implemented by all TMS320C64xx devices with 1MB of internal
42 * memory.
43 *
44 * This interface is defined to factor common data about this family into
45 * a single place; all TMS320C64xx devices with 1MB of internal
46 * memory extend this interface.
47 */
48 metaonly interface ITMS320C64_1M inherits ti.catalog.ICpuDataSheet
49 {
50
51 config long cacheSize[string] = [
52 ["4-way cache (0k)", 0x00000],
53 ["4-way cache (32k)", 0x08000],
54 ["4-way cache (64k)", 0x10000],
55 ["4-way cache (128k)", 0x20000],
56 ["4-way cache (256k)", 0x40000],
57 ["0k", 0x00000],
58 ["32k", 0x08000],
59 ["64k", 0x10000],
60 ["128k", 0x20000],
61 ["256k", 0x40000],
62 ];
63
64 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
65 ['l2Mode',{desc:"L2 Cache",
66 map : [["4-way cache (0k)",0x0000],
67 ["4-way cache (32k)",0x8000],
68 ["4-way cache (64k)",0x10000],
69 ["4-way cache (128k)",0x20000],
70 ["4-way cache (256k)",0x40000]],
71 defaultValue: "4-way cache (0k)",
72 memorySection: "IRAM"}]
73 ];
74
75
76 instance:
77 override config int minProgUnitSize = 1;
78 override config int minDataUnitSize = 1;
79 override config int dataWordSize = 4;
80
81 override config string cpuCore = "6400";
82 override config string isa = "64";
83 override config string cpuCoreRevision = "1.0";
84
85 /*!
86 * ======== memMap ========
87 * The default memory map for this device
88 */
89 config xdc.platform.IPlatform.Memory memMap[string] = [
90 ["IRAM", {
91 name: "IRAM",
92 comment: "Internal L2 memory",
93 base: 0x000000,
94 len: 0x100000,
95 space: "code/data",
96 access: "RWX"
97 }],
98 ];
99 }