module ti.catalog.arm.cortexm4.tiva.ce.Boot

Stellaris M3 Boot Support

The Boot module supports boot initialization for the Stellaris M3 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing). [ more ... ]
C synopsis target-domain sourced in ti/catalog/arm/cortexm4/tiva/ce/Boot.xdc
DETAILS
The Boot module supports boot initialization for the Stellaris M3 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
 
config Boot_A_mustNotUseEnhancedClockMode  // module-wide

Asserted in Boot_sysCtlClockFreqSet

C synopsis target-domain
extern const Assert_Id Boot_A_mustNotUseEnhancedClockMode;
 
 
config Boot_A_mustUseEnhancedClockMode  // module-wide

Asserted in Boot_sysCtlClockSet

C synopsis target-domain
extern const Assert_Id Boot_A_mustUseEnhancedClockMode;
 
 
Boot_sysCtlClockFreqSet()  // module-wide
C synopsis target-domain
ULong Boot_sysCtlClockFreqSet(ULong ulConfig, ULong ulSysClock);
 
 
Boot_sysCtlClockSet()  // module-wide
C synopsis target-domain
Void Boot_sysCtlClockSet(ULong ulConfig);
 
Module-Wide Built-Ins

C synopsis target-domain
Types_ModuleId Boot_Module_id();
// Get this module's unique id
 
Bool Boot_Module_startupDone();
// Test if this module has completed startup
 
IHeap_Handle Boot_Module_heap();
// The heap from which this module allocates memory
 
Bool Boot_Module_hasMask();
// Test whether this module has a diagnostics mask
 
Bits16 Boot_Module_getMask();
// Returns the diagnostics mask for this module
 
Void Boot_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
 
Configuration settings sourced in ti/catalog/arm/cortexm4/tiva/ce/Boot.xdc
var Boot = xdc.useModule('ti.catalog.arm.cortexm4.tiva.ce.Boot');
module-wide constants & types
    values of type Boot.LdoOut// 
        const Boot.LDOPCTL_2_55V;
        const Boot.LDOPCTL_2_60V;
        const Boot.LDOPCTL_2_65V;
        const Boot.LDOPCTL_2_70V;
        const Boot.LDOPCTL_2_75V;
        const Boot.LDOPCTL_2_25V;
        const Boot.LDOPCTL_2_30V;
        const Boot.LDOPCTL_2_35V;
        const Boot.LDOPCTL_2_40V;
        const Boot.LDOPCTL_2_45V;
        const Boot.LDOPCTL_2_50V;
 
    values of type Boot.OscSrc// 
        const Boot.OSCSRC_MAIN// Main oscillator;
        const Boot.OSCSRC_EXT32// External 32 KHz;
 
    values of type Boot.PwmDiv// 
        const Boot.PWMDIV_1// PWM clock /1;
        const Boot.PWMDIV_2// PWM clock /2;
        const Boot.PWMDIV_4// PWM clock /4;
        const Boot.PWMDIV_8// PWM clock /8;
        const Boot.PWMDIV_16// PWM clock /16;
        const Boot.PWMDIV_32// PWM clock /32;
        const Boot.PWMDIV_64// PWM clock /64;
 
    values of type Boot.SysDiv// 
 
    values of type Boot.VcoFreq// 
        const Boot.VCO_480// VCO is 480 MHz;
        const Boot.VCO_320// VCO is 320 MHz;
 
    values of type Boot.XtalFreq// 
        const Boot.XTAL_1MHZ// 1.0 MHz;
        const Boot.XTAL_1_84MHZ// 1.8432 MHz;
        const Boot.XTAL_2MHZ// 2.0 MHz;
        const Boot.XTAL_2_45MHZ// 2.4576 MHz;
        const Boot.XTAL_3_57MHZ// 3.579545 MHz;
        const Boot.XTAL_3_68MHZ// 3.6864 MHz;
        const Boot.XTAL_4MHZ// 4.0 MHz;
        const Boot.XTAL_4_09MHZ// 4.096 MHz;
        const Boot.XTAL_4_91MHZ// 4.9152 MHz;
        const Boot.XTAL_5MHZ// 5.0 MHz;
        const Boot.XTAL_5_12MHZ// 5.12 MHz;
        const Boot.XTAL_6MHZ// 6.0 MHz;
        const Boot.XTAL_6_14MHZ// 6.144 MHz;
        const Boot.XTAL_7_37MHZ// 7.3728 MHz;
        const Boot.XTAL_8MHZ// 8.0 MHz;
        const Boot.XTAL_8_19MHZ// 8.192 MHz;
        const Boot.XTAL_10MHZ// 10.0 MHz (USB);
        const Boot.XTAL_12MHZ// 12.0 MHz (USB);
        const Boot.XTAL_12_2MHZ// 12.288 MHz;
        const Boot.XTAL_13_5MHZ// 13.56 MHz;
        const Boot.XTAL_14_3MHZ// 14.31818 MHz;
        const Boot.XTAL_16MHZ// 16.0 MHz (USB);
        const Boot.XTAL_16_3MHZ// 16.384 MHz;
        const Boot.XTAL_18MHZ// 18.0 MHz;
        const Boot.XTAL_20MHZ// 20.0 MHz;
        const Boot.XTAL_24MHZ// 24.0 MHz;
        const Boot.XTAL_25MHZ// 25.0 MHz;
 
    var obj = new Boot.ModuleView// ;
        obj.configureClock = Bool  ...
        obj.sysClockDivEnable = Bool  ...
        obj.sysClockDiv = String  ...
        obj.pwmClockDivEnable = Bool  ...
        obj.pwmClockDiv = String  ...
        obj.xtal = String  ...
        obj.oscSrc = String  ...
        obj.pllBypass = Bool  ...
        obj.ioscDisable = Bool  ...
        obj.moscDisable = Bool  ...
module-wide config parameters
        msg: "A_mustNotUseEnhancedClockMode: This device does not support the Enhanced Clock Mode."
    };
        msg: "A_mustUseEnhancedClockMode: This device requires the Enhanced Clock Mode."
    };
 
    Boot.pllBypass// PLL Bypass flag = Bool false;
 
 
metaonly enum Boot.LdoOut
Configuration settings
values of type Boot.LdoOut
    const Boot.LDOPCTL_2_55V;
    const Boot.LDOPCTL_2_60V;
    const Boot.LDOPCTL_2_65V;
    const Boot.LDOPCTL_2_70V;
    const Boot.LDOPCTL_2_75V;
    const Boot.LDOPCTL_2_25V;
    const Boot.LDOPCTL_2_30V;
    const Boot.LDOPCTL_2_35V;
    const Boot.LDOPCTL_2_40V;
    const Boot.LDOPCTL_2_45V;
    const Boot.LDOPCTL_2_50V;
 
 
metaonly enum Boot.OscSrc
Configuration settings
values of type Boot.OscSrc
    const Boot.OSCSRC_MAIN;
    // Main oscillator
    const Boot.OSCSRC_INT;
    // Internal oscillator
    const Boot.OSCSRC_INT4;
    // Internal oscillator / 4
    const Boot.OSCSRC_INT30;
    // Internal 30 KHz oscillator
    const Boot.OSCSRC_EXT4_19;
    // External 4.19 MHz
    const Boot.OSCSRC_EXT32;
    // External 32 KHz
 
 
metaonly enum Boot.PwmDiv
Configuration settings
values of type Boot.PwmDiv
    const Boot.PWMDIV_1;
    // PWM clock /1
    const Boot.PWMDIV_2;
    // PWM clock /2
    const Boot.PWMDIV_4;
    // PWM clock /4
    const Boot.PWMDIV_8;
    // PWM clock /8
    const Boot.PWMDIV_16;
    // PWM clock /16
    const Boot.PWMDIV_32;
    // PWM clock /32
    const Boot.PWMDIV_64;
    // PWM clock /64
 
 
metaonly enum Boot.SysDiv
Configuration settings
values of type Boot.SysDiv
    const Boot.SYSDIV_1;
    // CPU clock is osc/pll / 1
    const Boot.SYSDIV_2;
    // CPU clock is osc/pll / 2
    const Boot.SYSDIV_3;
    // CPU clock is osc/pll / 3
    const Boot.SYSDIV_4;
    // CPU clock is osc/pll / 4
    const Boot.SYSDIV_5;
    // CPU clock is osc/pll / 5
    const Boot.SYSDIV_6;
    // CPU clock is osc/pll / 6
    const Boot.SYSDIV_7;
    // CPU clock is osc/pll / 7
    const Boot.SYSDIV_8;
    // CPU clock is osc/pll / 8
    const Boot.SYSDIV_9;
    // CPU clock is osc/pll / 9
    const Boot.SYSDIV_10;
    // CPU clock is osc/pll / 10
    const Boot.SYSDIV_11;
    // CPU clock is osc/pll / 11
    const Boot.SYSDIV_12;
    // CPU clock is osc/pll / 12
    const Boot.SYSDIV_13;
    // CPU clock is osc/pll / 13
    const Boot.SYSDIV_14;
    // CPU clock is osc/pll / 14
    const Boot.SYSDIV_15;
    // CPU clock is osc/pll / 15
    const Boot.SYSDIV_16;
    // CPU clock is osc/pll / 16
    const Boot.SYSDIV_17;
    // CPU clock is osc/pll / 17
    const Boot.SYSDIV_18;
    // CPU clock is osc/pll / 18
    const Boot.SYSDIV_19;
    // CPU clock is osc/pll / 19
    const Boot.SYSDIV_20;
    // CPU clock is osc/pll / 20
    const Boot.SYSDIV_21;
    // CPU clock is osc/pll / 21
    const Boot.SYSDIV_22;
    // CPU clock is osc/pll / 22
    const Boot.SYSDIV_23;
    // CPU clock is osc/pll / 23
    const Boot.SYSDIV_24;
    // CPU clock is osc/pll / 24
    const Boot.SYSDIV_25;
    // CPU clock is osc/pll / 25
    const Boot.SYSDIV_26;
    // CPU clock is osc/pll / 26
    const Boot.SYSDIV_27;
    // CPU clock is osc/pll / 27
    const Boot.SYSDIV_28;
    // CPU clock is osc/pll / 28
    const Boot.SYSDIV_29;
    // CPU clock is osc/pll / 29
    const Boot.SYSDIV_30;
    // CPU clock is osc/pll / 30
    const Boot.SYSDIV_31;
    // CPU clock is osc/pll / 31
    const Boot.SYSDIV_32;
    // CPU clock is osc/pll / 32
    const Boot.SYSDIV_33;
    // CPU clock is osc/pll / 33
    const Boot.SYSDIV_34;
    // CPU clock is osc/pll / 34
    const Boot.SYSDIV_35;
    // CPU clock is osc/pll / 35
    const Boot.SYSDIV_36;
    // CPU clock is osc/pll / 36
    const Boot.SYSDIV_37;
    // CPU clock is osc/pll / 37
    const Boot.SYSDIV_38;
    // CPU clock is osc/pll / 38
    const Boot.SYSDIV_39;
    // CPU clock is osc/pll / 39
    const Boot.SYSDIV_40;
    // CPU clock is osc/pll / 40
    const Boot.SYSDIV_41;
    // CPU clock is osc/pll / 41
    const Boot.SYSDIV_42;
    // CPU clock is osc/pll / 42
    const Boot.SYSDIV_43;
    // CPU clock is osc/pll / 43
    const Boot.SYSDIV_44;
    // CPU clock is osc/pll / 44
    const Boot.SYSDIV_45;
    // CPU clock is osc/pll / 45
    const Boot.SYSDIV_46;
    // CPU clock is osc/pll / 46
    const Boot.SYSDIV_47;
    // CPU clock is osc/pll / 47
    const Boot.SYSDIV_48;
    // CPU clock is osc/pll / 48
    const Boot.SYSDIV_49;
    // CPU clock is osc/pll / 49
    const Boot.SYSDIV_50;
    // CPU clock is osc/pll / 50
    const Boot.SYSDIV_51;
    // CPU clock is osc/pll / 51
    const Boot.SYSDIV_52;
    // CPU clock is osc/pll / 52
    const Boot.SYSDIV_53;
    // CPU clock is osc/pll / 53
    const Boot.SYSDIV_54;
    // CPU clock is osc/pll / 54
    const Boot.SYSDIV_55;
    // CPU clock is osc/pll / 55
    const Boot.SYSDIV_56;
    // CPU clock is osc/pll / 56
    const Boot.SYSDIV_57;
    // CPU clock is osc/pll / 57
    const Boot.SYSDIV_58;
    // CPU clock is osc/pll / 58
    const Boot.SYSDIV_59;
    // CPU clock is osc/pll / 59
    const Boot.SYSDIV_60;
    // CPU clock is osc/pll / 60
    const Boot.SYSDIV_61;
    // CPU clock is osc/pll / 61
    const Boot.SYSDIV_62;
    // CPU clock is osc/pll / 62
    const Boot.SYSDIV_63;
    // CPU clock is osc/pll / 63
    const Boot.SYSDIV_64;
    // CPU clock is osc/pll / 64
    const Boot.SYSDIV_2_5;
    // CPU clock is osc/pll / 2.5
    const Boot.SYSDIV_3_5;
    // CPU clock is osc/pll / 3.5
    const Boot.SYSDIV_4_5;
    // CPU clock is osc/pll / 4.5
    const Boot.SYSDIV_5_5;
    // CPU clock is osc/pll / 5.5
    const Boot.SYSDIV_6_5;
    // CPU clock is osc/pll / 6.5
    const Boot.SYSDIV_7_5;
    // CPU clock is osc/pll / 7.5
    const Boot.SYSDIV_8_5;
    // CPU clock is osc/pll / 8.5
    const Boot.SYSDIV_9_5;
    // CPU clock is osc/pll / 9.5
    const Boot.SYSDIV_10_5;
    // CPU clock is osc/pll / 10.5
    const Boot.SYSDIV_11_5;
    // CPU clock is osc/pll / 11.5
    const Boot.SYSDIV_12_5;
    // CPU clock is osc/pll / 12.5
    const Boot.SYSDIV_13_5;
    // CPU clock is osc/pll / 13.5
    const Boot.SYSDIV_14_5;
    // CPU clock is osc/pll / 14.5
    const Boot.SYSDIV_15_5;
    // CPU clock is osc/pll / 15.5
    const Boot.SYSDIV_16_5;
    // CPU clock is osc/pll / 16.5
    const Boot.SYSDIV_17_5;
    // CPU clock is osc/pll / 17.5
    const Boot.SYSDIV_18_5;
    // CPU clock is osc/pll / 18.5
    const Boot.SYSDIV_19_5;
    // CPU clock is osc/pll / 19.5
    const Boot.SYSDIV_20_5;
    // CPU clock is osc/pll / 20.5
    const Boot.SYSDIV_21_5;
    // CPU clock is osc/pll / 21.5
    const Boot.SYSDIV_22_5;
    // CPU clock is osc/pll / 22.5
    const Boot.SYSDIV_23_5;
    // CPU clock is osc/pll / 23.5
    const Boot.SYSDIV_24_5;
    // CPU clock is osc/pll / 24.5
    const Boot.SYSDIV_25_5;
    // CPU clock is osc/pll / 25.5
    const Boot.SYSDIV_26_5;
    // CPU clock is osc/pll / 26.5
    const Boot.SYSDIV_27_5;
    // CPU clock is osc/pll / 27.5
    const Boot.SYSDIV_28_5;
    // CPU clock is osc/pll / 28.5
    const Boot.SYSDIV_29_5;
    // CPU clock is osc/pll / 29.5
    const Boot.SYSDIV_30_5;
    // CPU clock is osc/pll / 30.5
    const Boot.SYSDIV_31_5;
    // CPU clock is osc/pll / 31.5
    const Boot.SYSDIV_32_5;
    // CPU clock is osc/pll / 32.5
    const Boot.SYSDIV_33_5;
    // CPU clock is osc/pll / 33.5
    const Boot.SYSDIV_34_5;
    // CPU clock is osc/pll / 34.5
    const Boot.SYSDIV_35_5;
    // CPU clock is osc/pll / 35.5
    const Boot.SYSDIV_36_5;
    // CPU clock is osc/pll / 36.5
    const Boot.SYSDIV_37_5;
    // CPU clock is osc/pll / 37.5
    const Boot.SYSDIV_38_5;
    // CPU clock is osc/pll / 38.5
    const Boot.SYSDIV_39_5;
    // CPU clock is osc/pll / 39.5
    const Boot.SYSDIV_40_5;
    // CPU clock is osc/pll / 40.5
    const Boot.SYSDIV_41_5;
    // CPU clock is osc/pll / 41.5
    const Boot.SYSDIV_42_5;
    // CPU clock is osc/pll / 42.5
    const Boot.SYSDIV_43_5;
    // CPU clock is osc/pll / 43.5
    const Boot.SYSDIV_44_5;
    // CPU clock is osc/pll / 44.5
    const Boot.SYSDIV_45_5;
    // CPU clock is osc/pll / 45.5
    const Boot.SYSDIV_46_5;
    // CPU clock is osc/pll / 46.5
    const Boot.SYSDIV_47_5;
    // CPU clock is osc/pll / 47.5
    const Boot.SYSDIV_48_5;
    // CPU clock is osc/pll / 48.5
    const Boot.SYSDIV_49_5;
    // CPU clock is osc/pll / 49.5
    const Boot.SYSDIV_50_5;
    // CPU clock is osc/pll / 50.5
    const Boot.SYSDIV_51_5;
    // CPU clock is osc/pll / 51.5
    const Boot.SYSDIV_52_5;
    // CPU clock is osc/pll / 52.5
    const Boot.SYSDIV_53_5;
    // CPU clock is osc/pll / 53.5
    const Boot.SYSDIV_54_5;
    // CPU clock is osc/pll / 54.5
    const Boot.SYSDIV_55_5;
    // CPU clock is osc/pll / 55.5
    const Boot.SYSDIV_56_5;
    // CPU clock is osc/pll / 56.5
    const Boot.SYSDIV_57_5;
    // CPU clock is osc/pll / 57.5
    const Boot.SYSDIV_58_5;
    // CPU clock is osc/pll / 58.5
    const Boot.SYSDIV_59_5;
    // CPU clock is osc/pll / 59.5
    const Boot.SYSDIV_60_5;
    // CPU clock is osc/pll / 60.5
    const Boot.SYSDIV_61_5;
    // CPU clock is osc/pll / 61.5
    const Boot.SYSDIV_62_5;
    // CPU clock is osc/pll / 62.5
    const Boot.SYSDIV_63_5;
    // CPU clock is osc/pll / 63.5
 
 
metaonly enum Boot.VcoFreq
Configuration settings
values of type Boot.VcoFreq
    const Boot.VCO_480;
    // VCO is 480 MHz
    const Boot.VCO_320;
    // VCO is 320 MHz
 
 
metaonly enum Boot.XtalFreq
Configuration settings
values of type Boot.XtalFreq
    const Boot.XTAL_1MHZ;
    // 1.0 MHz
    const Boot.XTAL_1_84MHZ;
    // 1.8432 MHz
    const Boot.XTAL_2MHZ;
    // 2.0 MHz
    const Boot.XTAL_2_45MHZ;
    // 2.4576 MHz
    const Boot.XTAL_3_57MHZ;
    // 3.579545 MHz
    const Boot.XTAL_3_68MHZ;
    // 3.6864 MHz
    const Boot.XTAL_4MHZ;
    // 4.0 MHz
    const Boot.XTAL_4_09MHZ;
    // 4.096 MHz
    const Boot.XTAL_4_91MHZ;
    // 4.9152 MHz
    const Boot.XTAL_5MHZ;
    // 5.0 MHz
    const Boot.XTAL_5_12MHZ;
    // 5.12 MHz
    const Boot.XTAL_6MHZ;
    // 6.0 MHz
    const Boot.XTAL_6_14MHZ;
    // 6.144 MHz
    const Boot.XTAL_7_37MHZ;
    // 7.3728 MHz
    const Boot.XTAL_8MHZ;
    // 8.0 MHz
    const Boot.XTAL_8_19MHZ;
    // 8.192 MHz
    const Boot.XTAL_10MHZ;
    // 10.0 MHz (USB)
    const Boot.XTAL_12MHZ;
    // 12.0 MHz (USB)
    const Boot.XTAL_12_2MHZ;
    // 12.288 MHz
    const Boot.XTAL_13_5MHZ;
    // 13.56 MHz
    const Boot.XTAL_14_3MHZ;
    // 14.31818 MHz
    const Boot.XTAL_16MHZ;
    // 16.0 MHz (USB)
    const Boot.XTAL_16_3MHZ;
    // 16.384 MHz
    const Boot.XTAL_18MHZ;
    // 18.0 MHz
    const Boot.XTAL_20MHZ;
    // 20.0 MHz
    const Boot.XTAL_24MHZ;
    // 24.0 MHz
    const Boot.XTAL_25MHZ;
    // 25.0 MHz
 
 
metaonly struct Boot.ModuleView
Configuration settings
var obj = new Boot.ModuleView;
 
    obj.configureClock = Bool  ...
    obj.sysClockDivEnable = Bool  ...
    obj.sysClockDiv = String  ...
    obj.pwmClockDivEnable = Bool  ...
    obj.pwmClockDiv = String  ...
    obj.xtal = String  ...
    obj.oscSrc = String  ...
    obj.pllBypass = Bool  ...
    obj.ioscDisable = Bool  ...
    obj.moscDisable = Bool  ...
 
 
config Boot.A_mustNotUseEnhancedClockMode  // module-wide

Asserted in Boot_sysCtlClockFreqSet

Configuration settings
Boot.A_mustNotUseEnhancedClockMode = Assert.Desc {
    msg: "A_mustNotUseEnhancedClockMode: This device does not support the Enhanced Clock Mode."
};
 
C SYNOPSIS
 
config Boot.A_mustUseEnhancedClockMode  // module-wide

Asserted in Boot_sysCtlClockSet

Configuration settings
Boot.A_mustUseEnhancedClockMode = Assert.Desc {
    msg: "A_mustUseEnhancedClockMode: This device requires the Enhanced Clock Mode."
};
 
C SYNOPSIS
 
metaonly config Boot.common$  // module-wide

Common module configuration parameters

Configuration settings
Boot.common$ = Types.Common$ undefined;
 
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
 
metaonly config Boot.configureClock  // module-wide

Clock configuration flag, default is false

Configuration settings
Boot.configureClock = Bool false;
 
DETAILS
Set to true to automatically configure the Clock.
 
metaonly config Boot.cpuFrequency  // module-wide

Desired CPU Clock Frequency in Hz

Configuration settings
Boot.cpuFrequency = UInt 40000000;
 
DETAILS
Configurable only on devices with "Enhanced Clocking Mode" support.
 
metaonly config Boot.enhancedClockMode  // module-wide

Enahnced Clocking Mode

Configuration settings
Boot.enhancedClockMode = Bool false;
 
DETAILS
Must be set to true for OneMCU devices that support this feature.
 
metaonly config Boot.ioscDisable  // module-wide

Internal Oscillator Disable flag

Configuration settings
Boot.ioscDisable = Bool false;
 
 
metaonly config Boot.moscDisable  // module-wide

Main Oscillator Disable flag

Configuration settings
Boot.moscDisable = Bool false;
 
 
metaonly config Boot.oscSrc  // module-wide

Oscillator Source

Configuration settings
Boot.oscSrc = Boot.OscSrc Boot.OSCSRC_MAIN;
 
 
metaonly config Boot.pllBypass  // module-wide

PLL Bypass flag

Configuration settings
Boot.pllBypass = Bool false;
 
 
metaonly config Boot.pwmClockDiv  // module-wide

PWM Clock Divisor

Configuration settings
Boot.pwmClockDiv = Boot.PwmDiv Boot.PWMDIV_1;
 
 
metaonly config Boot.rovViewInfo  // module-wide
Configuration settings
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
 
 
metaonly config Boot.sysClockDiv  // module-wide

SYS Clock Divisor

Configuration settings
Boot.sysClockDiv = Boot.SysDiv Boot.SYSDIV_1;
 
 
metaonly config Boot.vcoFreq  // module-wide

VCO frequency

Configuration settings
Boot.vcoFreq = Boot.VcoFreq Boot.VCO_320;
 
 
metaonly config Boot.xtal  // module-wide

Crystal Value

Configuration settings
 
generated on Thu, 23 May 2019 00:24:07 GMT