C28x large model Timing Benchmarks

Target Platform: ti.platforms.tms320x28:TMS320F280049M_regresstest:1

Tool Chain Version: 16.9.1

BIOS Version: bios_6_73_00_11_eng

XDCTools Version: xdctools_3_50_07_20_core

Benchmark	Cycles
Interrupt Latency	246
Hwi_restore()	19
Hwi_disable()	13
Hwi dispatcher prolog	203
Hwi dispatcher epilog	152
Hwi dispatcher	358
Hardware Interrupt to Blocked Task	580
Hardware Interrupt to Software Interrupt	417
Swi_enable()	86
Swi_disable()	11
Post Software Interrupt Again	33
Post Software Interrupt without Context Switch	118
Post Software Interrupt with Context Switch	226
Create a New Task without Context Switch	4269
Set a Task Priority without a Context Switch	184
Task_yield()	231
Post Semaphore No Waiting Task	89
Post Semaphore No Task Switch	202
Post Semaphore with Task Switch	283
Pend on Semaphore No Context Switch	70
Pend on Semaphore with Task Switch	322
Clock_getTicks()	11
POSIX Create a New Task without Context Switch	7227
POSIX Set a Task Priority without a Context Switch	235
POSIX Post Semaphore No Waiting Task	99
POSIX Post Semaphore No Task Switch	211
POSIX Post Semaphore with Task Switch	291
POSIX Pend on Semaphore No Context Switch	81
POSIX Pend on Semaphore with Task Switch	332

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-v28 -DLARGE_MODEL=1 -ml -mo –program_level_compile -o3”.

Runtime performance was optimized by reducing CPU clock speed to eliminate flash wait states.

The C28x targets also supports zero latency interrupts. See ti.sysbios.family.c28.Hwi cdocs for details.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.