IAR Cortex-M4 Object Size Benchmarks

Target Platform: ti.platforms.tiva:TM4C123GH6PM:1

Tool Chain Version: 8.20.2.58

BIOS Version: bios_6_73_00_11_eng

XDCTools Version: xdctools_3_50_07_20_core

Object Name	Size
Hwi	216
Swi	224
Task	280
Semaphore	200
GateMutex	208
Clock	208
POSIX Pthread	368
POSIX Semaphore	28
POSIX Mutex	168
POSIX Timer	232

The M4 target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi CDOCs for details.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.