MSP430 large code, restricted data Timing Benchmarks

Target Platform: ti.platforms.msp430:MSP430F5438A:1

Tool Chain Version: 18.1.1

BIOS Version: bios_6_73_00_11_eng

XDCTools Version: xdctools_3_50_07_20_core

Benchmark	Cycles
Interrupt Latency	263
Hwi_restore()	5
Hwi_disable()	3
Hwi dispatcher prolog	110
Hwi dispatcher epilog	123
Hwi dispatcher	245
Hardware Interrupt to Blocked Task	668
Hardware Interrupt to Software Interrupt	446
Swi_enable()	94
Swi_disable()	18
Post Software Interrupt Again	53
Post Software Interrupt without Context Switch	179
Post Software Interrupt with Context Switch	378
Create a New Task without Context Switch	9208
Set a Task Priority without a Context Switch	261
Task_yield()	373
Post Semaphore No Waiting Task	133
Post Semaphore No Task Switch	321
Post Semaphore with Task Switch	452
Pend on Semaphore No Context Switch	110
Pend on Semaphore with Task Switch	504
Clock_getTicks()	18
POSIX Create a New Task without Context Switch	13240
POSIX Set a Task Priority without a Context Switch	327
POSIX Post Semaphore No Waiting Task	235
POSIX Post Semaphore No Task Switch	330
POSIX Post Semaphore with Task Switch	461
POSIX Pend on Semaphore No Context Switch	119
POSIX Pend on Semaphore with Task Switch	513

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-vmspx –near_data=none –code_model=large –data_model=restricted -q –advice:power=1 –program_level_compile -o3”.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.