MSP430 large code, restricted data Timing Benchmarks

Target Platform: ti.platforms.msp430:MSP430F5438A:1

Tool Chain Version: 16.9.0

BIOS Version: bios_6_70_00_18_eng

XDCTools Version: xdctools_3_50_04_43_core

Benchmark	Cycles
Interrupt Latency	242
Hwi_restore()	5
Hwi_disable()	3
Hwi dispatcher prolog	110
Hwi dispatcher epilog	123
Hwi dispatcher	245
Hardware Interrupt to Blocked Task	784
Hardware Interrupt to Software Interrupt	395
Swi_enable()	71
Swi_disable()	18
Post Software Interrupt Again	33
Post Software Interrupt without Context Switch	140
Post Software Interrupt with Context Switch	340
Create a New Task without Context Switch	9181
Set a Task Priority without a Context Switch	255
Task_yield()	418
Post Semaphore No Waiting Task	112
Post Semaphore No Task Switch	370
Post Semaphore with Task Switch	560
Pend on Semaphore No Context Switch	107
Pend on Semaphore with Task Switch	563
Clock_getTicks()	18
POSIX Create a New Task without Context Switch	13173
POSIX Set a Task Priority without a Context Switch	321
POSIX Post Semaphore No Waiting Task	121
POSIX Post Semaphore No Task Switch	379
POSIX Post Semaphore with Task Switch	569
POSIX Pend on Semaphore No Context Switch	116
POSIX Pend on Semaphore with Task Switch	572

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-vmspx –near_data=none –code_model=large –data_model=restricted -q –advice:power=1 –program_level_compile -o3”.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.