C28x large model Timing Benchmarks

Target Platform: ti.platforms.tms320x28:TMS320F280049M:1

Tool Chain Version: 16.9.1

BIOS Version: bios_6_70_00_18_eng

XDCTools Version: xdctools_3_50_04_43_core

Benchmark	Cycles
Interrupt Latency	156
Hwi_restore()	19
Hwi_disable()	13
Hwi dispatcher prolog	205
Hwi dispatcher epilog	152
Hwi dispatcher	358
Hardware Interrupt to Blocked Task	692
Hardware Interrupt to Software Interrupt	420
Swi_enable()	85
Swi_disable()	12
Post Software Interrupt Again	33
Post Software Interrupt without Context Switch	116
Post Software Interrupt with Context Switch	228
Create a New Task without Context Switch	4336
Set a Task Priority without a Context Switch	191
Task_yield()	292
Post Semaphore No Waiting Task	92
Post Semaphore No Task Switch	258
Post Semaphore with Task Switch	391
Pend on Semaphore No Context Switch	70
Pend on Semaphore with Task Switch	383
Clock_getTicks()	10
POSIX Create a New Task without Context Switch	7242
POSIX Set a Task Priority without a Context Switch	242
POSIX Post Semaphore No Waiting Task	101
POSIX Post Semaphore No Task Switch	266
POSIX Post Semaphore with Task Switch	400
POSIX Pend on Semaphore No Context Switch	80
POSIX Pend on Semaphore with Task Switch	394

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-v28 -DLARGE_MODEL=1 -ml -mo –program_level_compile -o3”.

Runtime performance was optimized by reducing CPU clock speed to eliminate flash wait states.

The C28x targets also supports zero latency interrupts. See ti.sysbios.family.c28.Hwi cdocs for details.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.