Target Platform: ti.platforms.tiva:TM4C123GH6PM:1
Tool Chain Version: 6.3.1
BIOS Version: bios_6_51_00_11_eng
XDCTools Version: xdctools_3_50_02_20_core
Benchmark | Cycles |
---|---|
Interrupt Latency | 153 |
Hwi_restore() | 8 |
Hwi_disable() | 9 |
Hwi dispatcher prolog | 141 |
Hwi dispatcher epilog | 241 |
Hwi dispatcher | 373 |
Hardware Interrupt to Blocked Task | 679 |
Hardware Interrupt to Software Interrupt | 401 |
Swi_enable() | 72 |
Swi_disable() | 14 |
Post Software Interrupt Again | 30 |
Post Software Interrupt without Context Switch | 82 |
Post Software Interrupt with Context Switch | 188 |
Create a New Task without Context Switch | 3148 |
Set a Task Priority without a Context Switch | 156 |
Task_yield() | 291 |
Post Semaphore No Waiting Task | 49 |
Post Semaphore No Task Switch | 249 |
Post Semaphore with Task Switch | 388 |
Pend on Semaphore No Context Switch | 53 |
Pend on Semaphore with Task Switch | 391 |
Clock_getTicks() | 8 |
POSIX Create a New Task without Context Switch | 6251 |
POSIX Set a Task Priority without a Context Switch | 231 |
POSIX Post Semaphore No Waiting Task | 60 |
POSIX Post Semaphore No Task Switch | 262 |
POSIX Post Semaphore with Task Switch | 401 |
POSIX Pend on Semaphore No Context Switch | 66 |
POSIX Pend on Semaphore with Task Switch | 402 |
The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings:
“-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -O3 -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -Dti_sysbios_Build_useHwiMacros -Dfar= -D__DYNAMIC_REENT__”.
The M4F target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi cdocs for details.
See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.