Texas Instruments

Table of Contents

GCC Cortex-A9 with hard FP Timing Benchmarks

Target Platform: ti.platforms.sdp4430

Tool Chain Version: 4.9.3

BIOS Version: bios_6_50_00_06_eng

XDCTools Version: xdctools_3_50_00_09_eng

Benchmark Cycles
Interrupt Latency 286
Hwi_restore() 8
Hwi_disable() 4
Hwi dispatcher prolog 204
Hwi dispatcher epilog 161
Hwi dispatcher 367
Hardware Interrupt to Blocked Task 634
Hardware Interrupt to Software Interrupt 372
Swi_enable() 60
Swi_disable() 11
Post Software Interrupt Again 24
Post Software Interrupt without Context Switch 78
Post Software Interrupt with Context Switch 141
Create a New Task without Context Switch 1269
Set a Task Priority without a Context Switch 102
Task_yield() 262
Post Semaphore No Waiting Task 41
Post Semaphore No Task Switch 195
Post Semaphore with Task Switch 311
Pend on Semaphore No Context Switch 40
Pend on Semaphore with Task Switch 324
Clock_getTicks() 16
POSIX Create a New Task without Context Switch 2138
POSIX Set a Task Priority without a Context Switch 93
POSIX Post Semaphore No Waiting Task 44
POSIX Post Semaphore No Task Switch 203
POSIX Post Semaphore with Task Switch 341
POSIX Pend on Semaphore No Context Switch 44
POSIX Pend on Semaphore with Task Switch 351

As the timer used to run these benchmarks is run at 1/2 the CPU frequency, an deviation of +-2 cycles is to be expected.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.