1    /*
     2     * Copyright (c) 2012, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    /*
    33     *  ======== CTM.xdc ========
    34     *
    35     */
    36    
    37    package ti.sysbios.family.arp32;
    38    
    39    /*!
    40     *  ======== CTM ========
    41     *  Counter Timer Module Device Definitions.
    42     *
    43     *  For Ducati SYS/BIOS applications, 
    44     *  Counter/timer 0 is assigned to core 0's Timer 0 interrupt 18
    45     *  Counter/timer 1 is assigned to core 1's Timer 0 interrupt 22
    46     *  Counters 2/3 are assigned to core 0's TimestampProvider
    47     *  Counters 4/5 are assigned to core 1's TimestampProvider
    48     *  Counters 6,7 are for application use.
    49     *
    50     *  Counters 2/3 and 4/5 are in chained mode and started simultaneously
    51     *  by core 0 so that both cores timestamps are in sync with each other 
    52     *  AND both chained timers have independent SHADOW registers to guarantee
    53     *  64bit counter reading coherency.
    54     */
    55    
    56    module CTM
    57    {
    58        /*! 
    59         *  Counter Timer Module
    60         *  Physical Base address is 0x55080400
    61         *  Auto-configured virtual Base address is 0x40000400
    62         */
    63        struct CTM {
    64            UInt32 CTCNTL;          /*! 0x0000 */
    65            UInt32 RES_04 [7];      /*! 0x0004 - 0x0020 */
    66            UInt32 CTSTMCNTL;       /*! 0x0020 */
    67            UInt32 CTSTMMSTID;      /*! 0x0024 */
    68            UInt32 CTSTMINTVL;      /*! 0x0028 */
    69            UInt32 CTSTMSEL0;       /*! 0x002C */
    70            UInt32 CTSTMSEL1;       /*! 0x0030 */
    71            UInt32 RES_34 [3];      /*! 0x0034 - 0x0040 */
    72            UInt32 TINTVLR[8];      /*! 0x0040 - 0x0060 */
    73            UInt32 RES_60 [7];      /*! 0x0060 - 0x007C */
    74            UInt32 CTNUMDBG;        /*! 0x007C */
    75            UInt32 CTDBGSGL [8];    /*! 0x0080 - 0x00A0 */
    76            UInt32 RES_A0 [20];     /*! 0x00A0 - 0x00F0 */
    77            UInt32 CTGNBL [2];      /*! 0x00F0 - 0x00F8 */
    78            UInt32 CTGRST [2];      /*! 0x00F8 - 0x0100 */
    79            UInt32 CTCR [32];       /*! 0x0100 - 0x0180 */
    80            UInt32 CTCNTR [32];     /*! 0x0180 - 0x0200 */
    81        }
    82    
    83        /*!
    84         * Physical CTM Device. 
    85         * Short name is "CTM_ctm" 
    86         * Long name is "ti_sysbios_family_arp32.CTM_ctm" 
    87         */
    88        extern volatile CTM ctm;
    89    }
    90