1    /*
     2     * Copyright (c) 2014-2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     * */
    32    
    33    /*
    34     *  ======== Boot.xdc ========
    35     */
    36    
    37    package ti.sysbios.family.arm.msp432.init;
    38    
    39    import xdc.rov.ViewInfo;
    40    import xdc.runtime.Assert;
    41    
    42    /*!
    43     *  ======== Boot ========
    44     *  MSP432 device Boot Support.
    45     *
    46     *  The Boot module supports boot initialization for MSP432 devices.
    47     *  A special boot init function is created based on the configuration
    48     *  settings for this module.  This function is hooked into the
    49     *  xdc.runtime.Reset.fxns[] array and called very early at boot time.
    50     *
    51     *  The code to support the boot module is placed in a separate section
    52     *  named `".text:.bootCodeSection"` to allow placement of this section in
    53     *  the linker .cmd file if necessary. This section is a subsection of the
    54     *  `".text"` section so this code will be placed into the .text section unless
    55     *  explicitly placed, either through
    56     *  `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
    57     *  command file.
    58     */
    59    @Template("./Boot.xdt")
    60    module Boot
    61    {
    62       /*! clock speed setting */
    63        enum SpeedOpt {
    64            SpeedOpt_Low = 0,
    65            SpeedOpt_Medium = 1,
    66            SpeedOpt_High = 2
    67        };
    68    
    69        metaonly struct ModuleView {
    70            Bool    configureClocks;
    71            Bool    disableWatchdog;
    72        }
    73    
    74        @Facet
    75        metaonly config ViewInfo.Instance rovViewInfo =
    76            ViewInfo.create({
    77                viewMap: [
    78                [
    79                    'Module',
    80                    {
    81                        type: ViewInfo.MODULE,
    82                        viewInitFxn: 'viewInitModule',
    83                        structName: 'ModuleView'
    84                    }
    85                ],
    86                ]
    87            });
    88    
    89        /*!
    90         *  Clock configuration flag, default is true.
    91         *
    92         *  Set to false to disable clock configuration.
    93         *
    94         *  Clock configuration will setup the clock system (CS), VCORE, and
    95         *  Flash wait states appropriately, for one of three different device
    96         *  speed options, as selected by `{@link #speedSelect}`.
    97         */
    98        metaonly config Bool configureClocks = true;
    99    
   100        /*!
   101         *  Clock speed selection, default is SpeedOpt_High.
   102         *
   103         *  This enumeration is used to select one of three different speed options
   104         *  that will be configured when `{@link #configureClocks}` is set to
   105         *  "true".
   106         *
   107         *   @p(code)
   108         *   SpeedOpt_High will configure:
   109         *      MCLK =   48MHz from DCO, HFXT, or external clock
   110         *      HSMCLK = 24MHz from DCO, HFXT, or external clock
   111         *      SMCLK =  12MHz from DCO, HFXT, or external clock
   112         *      ACLK =   32KHz from REFOCLK, LFXT, or external clock
   113         *      BCLK =   32KHz from REFOCLK, LFXT, or external clock
   114         *      VCORE = 1 (AM1_LDO mode)
   115         *      Flash BNK0 and BNK1 read wait states = 2
   116         *
   117         *   SpeedOpt_Medium will configure:
   118         *      MCLK =   24MHz from DCO, HFXT, or external clock
   119         *      HSMCLK =  6MHz from DCO, HFXT, or external clock
   120         *      SMCLK =   6MHz from DCO, HFXT, or external clock
   121         *      ACLK =   32KHz from REFOCLK, LFXT, or external clock
   122         *      BCLK =   32KHz from REFOCLK, LFXT, or external clock
   123         *      VCORE = 1 (AM1_LDO mode)
   124         *      Flash BNK0 and BNK1 read wait states = 1
   125         *
   126         *   SpeedOpt_Low will configure:
   127         *      MCLK =   12MHz from DCO, HFXT, or external clock
   128         *      HSMCLK =  3MHz from DCO, HFXT, or external clock
   129         *      SMCLK =   3MHz from DCO, HFXT, or external clock
   130         *      ACLK =   32KHz from REFOCLK, LFXT, or external clock
   131         *      BCLK =   32KHz from REFOCLK, LFXT, or external clock
   132         *      VCORE = 0 (AM0_LDO mode)
   133         *      Flash BNK0 and BNK1 read wait states = 0
   134         *   @p
   135         */
   136        metaonly config SpeedOpt speedSelect = SpeedOpt_High;
   137    
   138        /*!
   139         *  Enable LF crystal (LFXT) flag, default is false.
   140         *
   141         *  If an external 32768-Hz LF crystal is available, set this flag to
   142         *  true to startup and enable the LFXT, for use as the ACLK and BCLK
   143         *  clock sources.
   144         */
   145        config Bool enableLFXT = false;
   146    
   147        /*!
   148         *  LF crystal bypass flag, default is false.
   149         *
   150         *  As an alternative to LFXT-sourced clocks, an external 32768-Hz square
   151         *  wave can be applied to LFXIN, to be used as the ACLK and BCLK clock
   152         *  sources.
   153         *
   154         *  To enable this mode, set Boot.enableLFXT to true to enable the LFXT
   155         *  pins, and set Boot.bypassLFXT to true to disable the LFXT oscillator.
   156         */
   157        config Bool bypassLFXT = false;
   158    
   159        /*!
   160         *  Enable HF crystal (HFXT) flag, default is false.
   161         *
   162         *  If an external 48-MHz HFXT crystal is available, set this flag to
   163         *  true to startup and enable the HFXT, for use as the MCLK, HSMCLK, and
   164         *  SMCLK clock sources.
   165         */
   166        config Bool enableHFXT = false;
   167    
   168        /*!
   169         *  HF crystal bypass flag, default is false.
   170         *
   171         *  As an alternative to HFXT-sourced clocks, an external 48-MHz square
   172         *  wave can be applied to HFXIN, to be used as the MCLK, HSMCLK, and SMCLK
   173         *  clock sources.
   174         *
   175         *  To enable this bypass mode, set Boot.enableHFXT to true to enable the
   176         *  HFXT pins, and set Boot.bypassHFXT to true to disable the HFXT
   177         *  oscillator.
   178         */
   179        config Bool bypassHFXT = false;
   180    
   181        /*!
   182         *  Watchdog disable configuration flag, default is true.
   183         *
   184         *  Set to false to disable the disabling of the watchdog.
   185         */
   186        metaonly config Bool disableWatchdog = true;
   187    
   188        /*!
   189         *  @_nodoc
   190         *  ======== registerFreqListener ========
   191         *  Register a module to be notified whenever the frequency changes.
   192         *
   193         *  The registered module must have a function named 'fireFrequencyUpdate'
   194         *  which takes the new frequency as an argument.
   195         */
   196        function registerFreqListener();
   197    
   198    internal:
   199    
   200        /*
   201         *  ======== init ========
   202         *  Generated entry point for clock and watchdog initialization.
   203         *
   204         *  Installed as a Startup.firstFxn.
   205         */
   206        Void init();
   207    
   208        /*!
   209         *  computed cpu frequency based on clock settings
   210         */
   211        metaonly config UInt computedCpuFrequency;
   212    
   213    };