1    /*
     2     * Copyright (c) 2015-2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    /*
    33     *  ======== Core.xdc ========
    34     */
    35    
    36    package ti.sysbios.family.arm.a15.smp;
    37    
    38    import xdc.runtime.Error;
    39    import ti.sysbios.family.arm.v7a.smp.GateSmp;
    40    
    41    /*!
    42     *  ======== Core ========
    43     *  Core Identification Module.
    44     */
    45    
    46    @ModuleStartup
    47    @CustomHeader
    48    @Template ("./Core.xdt")
    49    
    50    module Core inherits ti.sysbios.interfaces.ICore
    51    {
    52        /*!
    53         *  @_nodoc
    54         *  ======== CPUMASK ========
    55         */
    56        config UInt CPUMASK;
    57    
    58        /*!
    59         *  @_nodoc
    60         *  ======== initBootRegs ========
    61         *  Initialize AUX Core Boot 0 reg on OMAP5xxx/J6 or
    62         *  ARM boot magic registers on Keystone2
    63         *
    64         *  Needs to be set to true only for regressions as
    65         *  regressions load multiple programs back-to-back
    66         *  without doing a system reset.
    67         *
    68         *  If a system reset is performed, this config param
    69         *  can be set to false.
    70         */
    71        config Bool initBootRegs = false;
    72    
    73        /*!
    74         *  ======== useSkernelCmd ========
    75         *  Use sKernel command to wake-up cores on Keystone2 devices
    76         *
    77         *  This config param only has an effect when building apps
    78         *  for Keystone2 devices. It is ignored for all other devices
    79         *  like OMAP5xxx, DRA7xx, etc.
    80         *
    81         *  If set to true, this config param will cause SYS/BIOS
    82         *  to use sKernel commands to wake-up cores. This param
    83         *  is true by default.
    84         *
    85         *  If debugging using CCS, a gel script can be used to
    86         *  wake-up all cores instead of using sKernel commands
    87         *  at runtime. This config param can be disabled in this
    88         *  case.
    89         *
    90         *  Note: If debugging using CCS and using a gel script to
    91         *  wake-up all cores, the application needs to be loaded
    92         *  on only one of the cores. Only the app symbols need to
    93         *  be loaded on all other cores.
    94         */
    95        config Bool useSkernelCmd = true;
    96    
    97        /*!
    98         *  ======== resetSection ========
    99         *  Section to place the reset function
   100         *
   101         *  This configuration parameter allows the app to specify a named output
   102         *  section that will contain the SYS/BIOS core reset function.
   103         *  The core reset function is different from _c_int00 and internally
   104         *  calls _c_int00.
   105         *
   106         *  If resetSection is `null` (or `undefined`) the reset function is placed
   107         *  in the target's default text section.
   108         */
   109        config String resetSection = null;
   110    
   111        /*!
   112         *  @_nodoc
   113         *  ======== IpcFuncPtr ========
   114         *  IPC Callback function type definition.
   115         */
   116        typedef Void (*IpcFuncPtr)(UArg);
   117    
   118        @Macro
   119        override UInt hwiDisable();
   120    
   121        @Macro
   122        override UInt hwiEnable();
   123    
   124        @Macro
   125        override Void hwiRestore(UInt key);
   126    
   127        /*!
   128         *  @_nodoc
   129         *  ======== getRevisionNumber ========
   130         *  Returns the major and minor revision number for the Cortex-A15
   131         *  processor as a 2-nibble quantity [Major revision: Minor revision]
   132         *
   133         *  This API is used internally by different modules to check
   134         *  the ARM IP revision number and determine whether or not an
   135         *  errata applies and requires a workaround.
   136         */
   137        UInt8 getRevisionNumber();
   138    
   139        /*!
   140         *  @_nodoc
   141         *  ======== notifySpinLock ========
   142         */
   143        UInt notifySpinLock();
   144    
   145        /*!
   146         *  @_nodoc
   147         *  ======== notifySpinUnlock ========
   148         */
   149        Void notifySpinUnlock(UInt key);
   150    
   151        /*!
   152         *  @_nodoc
   153         *  ======== notify ========
   154         *  notify all cores specified by 'cpuMask' to execute callback function
   155         *  and wait for other cores to complete operation.
   156         *
   157         *  @param(func)    The callback function that is called by each
   158         *                  interrupted core. If function pointer is NULL,
   159         *                  the IPC handler simply returns.
   160         *  @param(arg)     Argument to be passed to the callback function.
   161         *  @param(cpuMask) Bit mask of all CPUs that should be interrupted.
   162         *                  If the MPCore sub-system has 4 CPUs and all need
   163         *                  to be interrupted, a bit mask of 0b1111 or 0xF
   164         *                  needs to be passed to Core_notify().
   165         *
   166         *  @a(NOTE)
   167         *  SGI numbers 0, 1, 2 ..., N, where N is the number of cores in MPCore
   168         *  sub-system, are reserved for the internal use of the kernel.
   169         *
   170         *  @a(NOTE)
   171         *  The call to this function should be protected with a
   172         *  Core_notifySpinLock()/Core_notifySpinUnlock(). This function should
   173         *  not be called with the inter-core lock already taken or it will spin
   174         *  forever as the other cores will not be able to service the notify
   175         *  interrupts.
   176         */
   177         Void notify(IpcFuncPtr func, UArg arg, UInt cpuMask);
   178    
   179    internal:
   180    
   181        /*
   182         *  ======== IpcMsg ========
   183         *  IPC message structure
   184         */
   185        struct IpcMsg {
   186            IpcFuncPtr  func;
   187            UArg        arg;
   188        };
   189    
   190        config GateSmp.Handle gate;
   191    
   192        /*
   193         *  ======== bootMagicBase ========
   194         *  Base address for the boot magic registers (Used only for K2 devices)
   195         */
   196        config UInt32 bootMagicBase;
   197    
   198        config Bool initStackFlag = true;
   199    
   200        /*
   201         *  ======== enableActlrSmp ========
   202         */
   203        Void enableActlrSmp();
   204    
   205        /*
   206         *  ======== resetOMAP5xxx ========
   207         */
   208        Void resetOMAP5xxx();
   209    
   210        /*
   211         *  ======== resetKeystone2 ========
   212         */
   213        Void resetKeystone2();
   214    
   215        /*
   216         *  ======== startCoreXOMAP5xxx ========
   217         */
   218        Void startCoreXOMAP5xxx();
   219    
   220        /*
   221         *  ======== startCoreXKeystone2 ========
   222         */
   223        Void startCoreXKeystone2();
   224    
   225        /*
   226         *  ======== exit ========
   227         */
   228        Void exit(UArg arg);
   229    
   230        /*
   231         *  ======== hwiFunc ========
   232         *
   233         *  Hwi func attached to Core.interruptCore()
   234         */
   235        Void hwiFunc(UArg arg);
   236    
   237        /*
   238         *  ======== skernelCmd ========
   239         *  Secure Kernel Command
   240         */
   241        Void skernelCmd(UInt32 cmd, UInt32 coreId, UInt32 startAddr);
   242    
   243        /*
   244         *  ======== smpBoot ========
   245         */
   246        Void smpBoot();
   247    
   248        /*
   249         *  ======== startup ========
   250         *  Other core's first function
   251         */
   252        Void startup();
   253    
   254        /*!
   255         *  ======== atexit ========
   256         *  atexit() func used to signal the other core to halt
   257         */
   258        Void atexit(Int arg);
   259    
   260        struct Module_State {
   261            Bool             gateEntered[];
   262            UInt             schedulerInts[];
   263            volatile Bool    syncCores[][];
   264            volatile IpcMsg  ipcMsg[];
   265            volatile Bool    notifyLock;
   266        };
   267    }