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37
38 package ti.catalog.c2800.initF2837x;
39
40 import xdc.rov.ViewInfo;
41
42 /*!
43 * ======== Boot ========
44 * Soprano Boot Support.
45 *
46 * The Boot module supports boot initialization for the C28 Soprano cores.
47 * A special boot init function is created based on the configuration
48 * settings for this module. This function is hooked into the
49 * xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
50 * to cinit processing).
51 *
52 * The code to support the boot module is placed in a separate section
53 * named `".text:.bootCodeSection"` to allow placement of this section in
54 * the linker .cmd file if necessary. This section is a subsection of the
55 * `".text"` section so this code will be placed into the .text section unless
56 * explicitly placed, either through
57 * `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
58 * command file.
59 */
60 @Template("./Boot.xdt")
61 @NoRuntime
62 module Boot
63 {
64 /*! System PLL Fractional Multiplier (SPLLFMULT) value */
65 metaonly enum FractMult {
66 Fract_0 = 0x000, /*! Fractional multiplier is 0 */
67 Fract_25 = 0x100, /*! Fractional multiplier is 0.25 */
68 Fract_50 = 0x200, /*! Fractional multiplier is 0.5 */
69 Fract_75 = 0x300 /*! Fractional multiplier is 0.75 */
70 }
71
72 /*! Oscillator Clock Source Select Bit for OSCCLK */
73 metaonly enum OscClk {
74 OscClk_INTOSC2 = 0x0, /*! internal oscillator 2 (default on reset) */
75 OscClk_XTAL = 0x1, /*! external oscillator */
76 OscClk_INTOSC1 = 0x2, /*! internal oscillator 1 */
77 OscClk_RESERVED = 0x3 /*! reserved (default to INTOSC1) */
78 }
79
80 metaonly struct ModuleView {
81 Bool configureClocks;
82 UInt OSCCLK;
83 UInt SPLLIMULT;
84 String SPLLFMULT;
85 String SYSCLKDIVSEL;
86 Bool bootCPU2;
87 }
88
89 @Facet
90 metaonly config ViewInfo.Instance rovViewInfo =
91 ViewInfo.create({
92 viewMap: [
93 [
94 'Module',
95 {
96 type: ViewInfo.MODULE,
97 viewInitFxn: 'viewInitModule',
98 structName: 'ModuleView'
99 }
100 ],
101 ]
102 });
103
104 /*!
105 * Clock configuration flag, default is false.
106 *
107 * Set to true to configure the PLL and system subsystem clock
108 * dividers.
109 */
110 config Bool configureClocks = false;
111
112 /*!
113 * Oscillator Clock source select bit for OSCCLK
114 *
115 * The default on reset is INTOSC2
116 */
117 metaonly config OscClk OSCCLKSRCSEL = OscClk_INTOSC2;
118
119 /*!
120 * Watchdog disable flag, default is false.
121 *
122 * Set to true to disable the watchdog timer.
123 */
124 metaonly config Bool disableWatchdog = false;
125
126 /*!
127 * OSCCLK input frequency to PLL, in MHz.
128 *
129 * This is the frequency of the oscillator clock (OSCCLK) input to the
130 * PLL. The default internal oscillator is 10 Mhz.
131 */
132 metaonly config UInt OSCCLK = 10;
133
134 /*! System PLL Integer Multiplier (SPLLIMULT) value */
135 metaonly config UInt SPLLIMULT = 1;
136
137 /*! System PLL Fractional Multiplier (SPLLFMULT) value */
138 metaonly config FractMult SPLLFMULT = Fract_0;
139
140 /*! System Clock Divider Select (SYSCLKDIVSEL) value */
141 metaonly config UInt SYSCLKDIVSEL = 2;
142
143 /*!
144 * Flash controller configuration flag, default is true.
145 *
146 * Set to true to enable the configuration of the Flash controller
147 * wait states, program and data cache.
148 */
149 metaonly config Bool configureFlashController = true;
150
151 /*!
152 * Flash controller wait states configuration flag, default is true.
153 *
154 * Set to true to configure the Flash controller wait states. The number
155 * of wait states is computed based upon the CPU frequency.
156 */
157 metaonly config Bool configureFlashWaitStates = true;
158
159 /*!
160 * Flash controller program cache enable flag, default is true.
161 *
162 * Set to true to enable the Flash controller's program cache.
163 */
164 metaonly config Bool enableFlashProgramCache = true;
165
166 /*!
167 * Flash controller data cache enable flag, default is true.
168 *
169 * Set to true to enable the Flash controller's data cache.
170 */
171 metaonly config Bool enableFlashDataCache = true;
172
173 /*!
174 * Function to be called when Limp mode is detected.
175 *
176 * This function is called when the Boot module is about to configure
177 * the PLL, but finds the device operating in Limp mode (i.e., the mode
178 * when a missing OSCCLK input has been detected).
179 *
180 * If this function is not specified by the application, a default
181 * function will be used, which spins in an infinite loop.
182 */
183 metaonly config Fxn limpAbortFunction;
184
185 /*!
186 * Boot from Flash flag. Default is true.
187 *
188 * Set to true to enable booting CPU1 from Flash.
189 */
190 metaonly config Bool bootFromFlash = true;
191
192 /*!
193 * Initiate booting of the CPU2 processor. Default is false.
194 *
195 * Set to true to enable CPU1 to initiate boot of CPU2.
196 *
197 * If enabled, this will occur after the optional clock configuration
198 * step, enabled by `{@link #configureClocks}`.
199 */
200 metaonly config Bool bootCPU2 = false;
201
202 /*!
203 * Configure Shared RAM regions before booting the C28 processor.
204 * Default is true.
205 *
206 * Set to true to enable Shared RAM regions S0-S7, to set the
207 * owner of each region and the write access permissions for the onwer.
208 */
209 metaonly config Bool configSharedRAMs = true;
210
211 /*!
212 * ======== sharedMemoryOwnerMask ========
213 * Shared RAM owner select mask.
214 *
215 * This parameter is used for writing the GSxMSEL register.
216 * By default, each value of each shared RAM select bit is '0'.
217 * This means the CPU1 is the owner and has write access.
218 * Setting a '1' in any bit position makes CPU2 the owner of that
219 * shared RAM segment.
220 */
221 metaonly config Bits32 sharedMemoryOwnerMask = 0;
222
223 /*!
224 * ======== loadSegment ========
225 * Specifies where to load the flash function (include the 'PAGE' number)
226 *
227 * If 'configureFlashWaitStates' is true, then this parameter
228 * determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
229 * section gets loaded.
230 */
231 metaonly config String loadSegment;
232
233 /*!
234 * ======== runSegment ========
235 * Specifies where to run the flash function (include the 'PAGE' number)
236 *
237 * If 'configureFlashWaitStates' is true then this parameter
238 * determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
239 * section gets executed at runtime.
240 */
241 metaonly config String runSegment;
242
243 /*!
244 * @_nodoc
245 * ======== getFrequency ========
246 * Gets the resulting CPU frequency (in Hz) given the Clock
247 * configuration parameters.
248 *
249 */
250 UInt32 getFrequency();
251
252 /*!
253 * @_nodoc
254 * ======== registerFreqListener ========
255 * Register a module to be notified whenever the frequency changes.
256 *
257 * The registered module must have a function named 'fireFrequencyUpdate'
258 * which takes the new frequency as an argument.
259 */
260 function registerFreqListener();
261
262 internal:
263
264
265 metaonly config UInt timestampFreq;
266
267
268 metaonly config String displayFrequency;
269
270
271 metaonly config UInt flashWaitStates = 3;
272
273 };