Texas Instruments

Table of Contents

TI Cortex-M4 Timing Benchmarks

Target Platform: ti.platforms.simplelink:CC3200:1

Tool Chain Version: 16.9.0

BIOS Version: bios_6_46_02_46_eng

XDCTools Version: xdctools_3_32_01_22

Benchmark Cycles
Interrupt Latency 128
Hwi_restore() 11
Hwi_disable() 14
Hwi dispatcher prolog 107
Hwi dispatcher epilog 234
Hwi dispatcher 336
Hardware Interrupt to Blocked Task 554
Hardware Interrupt to Software Interrupt 382
Swi_enable() 84
Swi_disable() 11
Post Software Interrupt Again 37
Post Software Interrupt without Context Switch 102
Post Software Interrupt with Context Switch 198
Create a New Task without Context Switch 2057
Set a Task Priority without a Context Switch 176
Task_yield() 215
Post Semaphore No Waiting Task 51
Post Semaphore No Task Switch 199
Post Semaphore with Task Switch 269
Pend on Semaphore No Context Switch 83
Pend on Semaphore with Task Switch 292
Clock_getTicks() 8
POSIX Create a New Task without Context Switch 4120
POSIX Set a Task Priority without a Context Switch 239
POSIX Post Semaphore No Waiting Task 67
POSIX Post Semaphore No Task Switch 219
POSIX Post Semaphore with Task Switch 285
POSIX Pend on Semaphore No Context Switch 97
POSIX Pend on Semaphore with Task Switch 304

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “–endian=little -mv7M4 –float_support=vfplib –abi=eabi -q -ms –opt_for_speed=2 –program_level_compile -o3”.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.