Texas Instruments

Table of Contents

GCC Cortex-A9 with hard FP Timing Benchmarks

Target Platform: ti.platforms.sdp4430

Tool Chain Version: 4.9.3

BIOS Version: bios_6_46_02_46_eng

XDCTools Version: xdctools_3_32_01_22

Benchmark Cycles
Interrupt Latency 285
Hwi_restore() 8
Hwi_disable() 4
Hwi dispatcher prolog 205
Hwi dispatcher epilog 161
Hwi dispatcher 369
Hardware Interrupt to Blocked Task 646
Hardware Interrupt to Software Interrupt 373
Swi_enable() 65
Swi_disable() 11
Post Software Interrupt Again 24
Post Software Interrupt without Context Switch 78
Post Software Interrupt with Context Switch 141
Create a New Task without Context Switch 1334
Set a Task Priority without a Context Switch 101
Task_yield() 268
Post Semaphore No Waiting Task 41
Post Semaphore No Task Switch 204
Post Semaphore with Task Switch 340
Pend on Semaphore No Context Switch 40
Pend on Semaphore with Task Switch 348
Clock_getTicks() 6
POSIX Create a New Task without Context Switch 2267
POSIX Set a Task Priority without a Context Switch 93
POSIX Post Semaphore No Waiting Task 44
POSIX Post Semaphore No Task Switch 214
POSIX Post Semaphore with Task Switch 371
POSIX Pend on Semaphore No Context Switch 70
POSIX Pend on Semaphore with Task Switch 370

As the timer used to run these benchmarks is run at 1/2 the CPU frequency, an deviation of +-2 cycles is to be expected.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.